ZHCSEH2D September 2014 – August 2025 DRV2624
PRODUCTION DATA
| 寄存器編號 | 默認值 | 位 7 | 位 6 | 位 5 | 位 4 | 位 3 | 位 2 | 位 1 | 位 0 |
|---|---|---|---|---|---|---|---|---|---|
| 0x00 | 0x03 | CHIPID[3:0] | REV[3:0] | ||||||
| 0x01 | 0x00 | DIAG_RESULT | 保留 | PRG_ERROR | PROCESS_DONE | UVLO | OVER_TEMP | OC_DETECT | |
| 0x02 | 0x18 | 保留 | INTZ_MASK[3:0] | ||||||
| 0x03 | 0x00 | DIAG_Z_RESULT[7:0] | |||||||
| 0x04 | 0x00 | VBAT[7:0] | |||||||
| 0x05 | 0x00 | 保留 | LRA_PERIOD[9:8] | ||||||
| 0x06 | 0x00 | LRA_PERIOD[7:0] | |||||||
| 0x07 | 0x44 | I2C_BCAST_EN | LRA_PERIOD_AVG_DIS | LINEREG_COMP_SEL[1:0] | TRIG_PIN_FUNC[1:0] | MODE[1:0] | |||
| 0x08 | 0x88 | LRA_ERM | CONTROL_LOOP | HYBRID_LOOP | AUTO_BRK_OL | AUTO_BRK_INTO_STBY | INPUT_SLOPE_CHECK | 保留 | |
| 0x09 | 0x00 | BAT_LIFE_EXT_LVL_EN[1:0] | 保留 | UVLO_THRES[2:0] | |||||
| 0x0A | 0x92 | BAT_LIFE_EXT_LVL1[7:0] | |||||||
| 0x0B | 0x8D | BAT_LIFE_EXT_LVL2[7:0] | |||||||
| 0x0C | 0x00 | 保留 | GO | ||||||
| 0x0D | 0x00 | 保留 | PLAYBACK_INTERVAL | 保留 | DIG_MEM_GAIN[1:0] | ||||
| 0x0E | 0x7F | RTP_INPUT[7:0] | |||||||
| 0x0F | 0x01 | WAIT1 | WAV_FRM_SEQ1[6:0] | ||||||
| 0x10 | 0x00 | WAIT2 | WAV_FRM_SEQ2[6:0] | ||||||
| 0x11 | 0x00 | WAIT3 | WAV_FRM_SEQ3[6:0] | ||||||
| 0x12 | 0x00 | WAIT4 | WAV_FRM_SEQ4[6:0] | ||||||
| 0x13 | 0x00 | WAIT5 | WAV_FRM_SEQ5[6:0] | ||||||
| 0x14 | 0x00 | WAIT6 | WAV_FRM_SEQ6[6:0] | ||||||
| 0x15 | 0x00 | WAIT7 | WAV_FRM_SEQ7[6:0] | ||||||
| 0x16 | 0x00 | WAIT8 | WAV_FRM_SEQ8[6:0] | ||||||
| 0x17 | 0x00 | WAV4_SEQ_LOOP[1:0] | WAV3_SEQ_LOOP[1:0] | WAV2_SEQ_LOOP[1:0] | WAV1_SEQ_LOOP[1:0] | ||||
| 0x18 | 0x00 | WAV8_SEQ_LOOP[1:0] | WAV7_SEQ_LOOP[1:0] | WAV6_SEQ_LOOP[1:0] | WAV5_SEQ_LOOP[1:0] | ||||
| 0x19 | 0x00 | 保留 | WAV_SEQ_MAIN_LOOP[2:0] | ||||||
| 0x1A | 0x00 | ODT[7:0] | |||||||
| 0x1B | 0x00 | SPT[7:0] | |||||||
| 0x1C | 0x00 | SNT[7:0] | |||||||
| 0x1D | 0x00 | BRT[7:0] | |||||||
| 0x1F | 0x3F | RATED_VOLTAGE[7:0] | |||||||
| 0x20 | 0x89 | OD_CLAMP[7:0] | |||||||
| 0x21 | 0x0D | A_CAL_COMP[7:0] | |||||||
| 0x22 | 0x6D | A_CAL_BEMF[7:0] | |||||||
| 0x23 | 0x36 | NG_THRESH | FB_BRAKE_FACTOR[2:0] | LOOP_GAIN[1:0] | BEMF_GAIN[1:0] | ||||
| 0x24 | 0x64 | RATED_VOLTAGE_CLAMP[7:0] | |||||||
| 0x25 | 0x80 | OD_CLAMP_LVL1[7:0] | |||||||
| 0x26 | 0x00 | OD_CLAMP_LVL2[7:0] | |||||||
| 0x27 | 0x10 | LRA_MIN_FREQ_SEL | LRA_RESYNC_FORMAT | 保留 | DRIVE_TIME[4:0] | ||||
| 0x28 | 0x11 | BLANKING_TIME[3:0] | IDISS_TIME[3:0] | ||||||
| 0x29 | 0x0C | 保留 | OD_CLAMP_TIME[1:0] | SAMPLE_TIME[1:0] | ZC_DET_TIME[1:0] | ||||
| 0x2A | 0x02 | 保留 | AUTO_CAL_TIME[1:0] | ||||||
| 0x2C | 0x00 | LRA_AUTO_OPEN_LOOP | AUTO_OL_CNT[1:0] | 保留 | LRA_WAVE_SHAPE | ||||
| 0x2E | 0x00 | 保留 | OL_LRA_PERIOD[9:0] | ||||||
| 0x2F | 0xC6 | OL_LRA_PERIOD[9:0] | |||||||
| 0x30 | 0x00 | CURRENT_K[7:0] | |||||||
| FD | 0x00 | RAM_ADDR[15:8] | |||||||
| FE | 0x00 | RAM_ADDR[7:0] | |||||||
| FF | 0x00 | RAM_DATA[7:0] | |||||||