PLLATINUMSIM-SW — PLLatinum Sim Tool
PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.
The CDCLVC11xx is a modular, high-performance, low-skew, general-purpose clock buffer family from Texas Instruments.
The entire family is designed with a modular approach in mind. It is intended to round up TIs series of LVCMOS clock generators.
Seven different fan-out variations, 1:2 to 1:12, are available. All of the devices are pin-compatible to each other for easy handling.
All family members share the same high performing characteristics such as low additive jitter, low skew, and wide operating temperature range.
The CDCLVC11xx supports an asynchronous output enable control (1G) which switches the outputs into a low state when 1G is low.
The CDCLVC11xx family operates in a 2.5-V and
3.3-V environment and are characterized for operation from –40°C to 85°C.
| 類型 | 標(biāo)題 | 下載最新的英語版本 | 日期 | |||
|---|---|---|---|---|---|---|
| * | 數(shù)據(jù)表 | CDCLVC11xx 3.3-V and 2.5-V LVCMOS High-Performance Clock Buffer Family 數(shù)據(jù)表 (Rev. B) | PDF | HTML | 2017年 2月 24日 | ||
| 應(yīng)用手冊 | 使用時(shí)鐘緩沖器進(jìn)行正弦波-方波轉(zhuǎn)換 | PDF | HTML | 英語版 | PDF | HTML | 2024年 9月 4日 | |
| 應(yīng)用手冊 | How to Apply 1.8-V Signals to 3.3-V CDCLVC11xx Fanout Clock Buffer | 2010年 11月 30日 |
如需其他信息或資源,請點(diǎn)擊以下任一標(biāo)題進(jìn)入詳情頁面查看(如有)。
PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.
此參考設(shè)計(jì)展示了 DP83848K 以太網(wǎng) PHY 收發(fā)器器件的先進(jìn)功能,支持10/100 Base-T,并符合 IEEE 802.3 標(biāo)準(zhǔn)。整個(gè)參考設(shè)計(jì)由單個(gè)電源供電(帶板載穩(wěn)壓器 5V 或單獨(dú) 3.3V)。以太網(wǎng) PHY (...)
| 封裝 | 引腳 | CAD 符號、封裝和 3D 模型 |
|---|---|---|
| TSSOP (PW) | 8 | Ultra Librarian |
推薦產(chǎn)品可能包含與 TI 此產(chǎn)品相關(guān)的參數(shù)、評估模塊或參考設(shè)計(jì)。
PLLatinum Sim User's Guide
PLLatinum Sim software manifest
PLLatinum Sim 1.6.9 includes the ability to manually specify points on a phase noise curve (for VCOs or other devices that do not fit the standard three-point model), and as a result the phase noise estimation for many devices which use a BAW VCO is greatly improved. Also includes a bugfix for cascading noise inputs.