2 Measuring PSRR of LDO

The following sections explain different methods of measuring the PSRR of an LDO.

1. Measuring PSRR using LC summing node method:

The basic method of measuring PSRR is shown in Figure 2. In this method, DC voltage and AC voltages are summed together and applied at the input of the LDO. VDC is the operating point bias voltage and VAC is the noise source used in the test. Capacitor C prevents VAC from shoring VDC and inductor L prevents VDC from shorting VAC. So L and C are used for isolating both the sources, VDC and VAC, from each other.

The L and C will create a high pass filter for VAC which will limit how low in frequency we can measure the PSRR. The 3dB point of this filter is determined by Equation 2. Frequencies below the 3dB point will start to be attenuated which will make measurements more difficult. The highest frequency that can be measured is determined by the self resonant frequencies of the L and C components.

Equation 2.   F_min = 1/ 2Π √LC

A drawback to this method is that it works well only for mid-range frequencies (approximately 1 kHz to 500 kHz).

Figure 2. Basic Method of Measuring PSRR of LDO
2. Measuring PSRR using summing amplifier

To improve the measurement of PSRR, a recommended method is described using a high-bandwidth amplifier as summing node to inject the signals and provides the isolation between VAC and VDC. This method is tested and verified using TPS72715 LDO and THS3120 high-speed amplifier from Texas Instruments. The basic set-up is shown in Figure 3. The PSRR is measured with a no-load condition and the resulting measured PSRR graph corresponds with the datasheet graph of PSRR.

Keep in mind the following while measuring the PSRR using this method:

1. The input capacitor of LDO should be removed before the measurement because this capacitor could cause the high-speed amplifier to go unstable.
2. Vin and Vout should be measured with high-impedance probes (either scope or network analyzer) immediately at the Vin or Vout pins to minimize the set-up inductance effects.
3. There test set-up should not have any long wires since this will add inductance and impact the results.
4. While selecting the values of AC and DC inputs, the following conditions should be considered:

VAC (max) + VDC < V_ABS (max) of LDO

VDC – VAC > V_UVLO of LDO

Also, the best results will be obtained if:

VDC–VAC>Vout + Vdo + 0.5 where Vout is the output voltage of the LDO and Vdo is the specified drop out voltage at the operating point.

5. At very high frequencies, the response of the amplifier will start to attenuate the VAC signal that is applied to the LDO. At some point, the attenuated VAC will be too small to measure on the output of the LDO.
6. As load current increases, the open-loop output impedance of LDO decreases (Since a MOSFET output impedance is inversely proportional to the drain current), thus lowering the gain. Increasing the load current also pushes the output pole to higher frequencies, which increases the feedback loop bandwidth. The net effect of increasing the load is therefore reduced PSRR at lower frequencies (because of reduced gain) along with increased PSRR at higher frequencies.
Figure 3. Recommended Method of Measuring PSRR of LDO

Figure 4 shows the PSRR graph measured with this method.

Figure 4. PSRR Measured With Recommended Method

The THS3120 is suitable for measuring PSRR up to VDC = 5V, Frequency = 10MHz and I_load = 400mA.