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TPS753

正在供貨

具有低 IQ 和復(fù)位延遲功能的 1.5A、超低壓降穩(wěn)壓器

可提供此產(chǎn)品的更新版本

功能與比較器件相同,但引腳排列有所不同
TPS7A52 正在供貨 2A、低輸入電壓 (1.1V)、低噪聲、高精度、超低壓降 (LDO) 穩(wěn)壓器 Lower noise performance in smaller enhanced QFN package

產(chǎn)品詳情

Rating Catalog Vin (max) (V) 5.5 Vin (min) (V) 2.7 Iout (max) (A) 1.5 Output options Adjustable Output, Fixed Output Vout (max) (V) 5 Vout (min) (V) 1.5 Fixed output options (V) 1.5, 1.8, 2.5, 3.3 Noise (μVrms) 60 PSRR at 100 KHz (dB) 17 Iq (typ) (mA) 0.075 Features Enable, Power good Thermal resistance θJA (°C/W) 43 Load capacitance (min) (μF) 47 Regulated outputs (#) 1 Accuracy (%) 2 Dropout voltage (Vdo) (typ) (mV) 160 Operating temperature range (°C) -40 to 125
Rating Catalog Vin (max) (V) 5.5 Vin (min) (V) 2.7 Iout (max) (A) 1.5 Output options Adjustable Output, Fixed Output Vout (max) (V) 5 Vout (min) (V) 1.5 Fixed output options (V) 1.5, 1.8, 2.5, 3.3 Noise (μVrms) 60 PSRR at 100 KHz (dB) 17 Iq (typ) (mA) 0.075 Features Enable, Power good Thermal resistance θJA (°C/W) 43 Load capacitance (min) (μF) 47 Regulated outputs (#) 1 Accuracy (%) 2 Dropout voltage (Vdo) (typ) (mV) 160 Operating temperature range (°C) -40 to 125
HTSSOP (PWP) 20 41.6 mm2 6.5 x 6.4
  • 1.5-A Low-Dropout Voltage Regulator
  • Available in 1.5 V, 1.8 V, 2.5 V, and 3.3 V Fixed Output and Adjustable Versions
  • Open Drain Power-Good (PG) Status Output (TPS751xxQ)
  • Open Drain Power-On Reset With 100ms Delay (TPS753xxQ)
  • Dropout Voltage Typically 160 mV at 1.5 A (TPS75133Q)
  • Ultralow 75-μA Typical Quiescent Current
  • Fast Transient Response
  • 2% Tolerance Over Specified Conditions for Fixed-Output Versions
  • 20-Pin TSSOP PowerPAD? (PWP) Package
  • Thermal Shutdown Protection
  • APPLICATIONS
    • Telecom
    • Servers
    • DSP, FPGA Supplies

PowerPAD is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.

  • 1.5-A Low-Dropout Voltage Regulator
  • Available in 1.5 V, 1.8 V, 2.5 V, and 3.3 V Fixed Output and Adjustable Versions
  • Open Drain Power-Good (PG) Status Output (TPS751xxQ)
  • Open Drain Power-On Reset With 100ms Delay (TPS753xxQ)
  • Dropout Voltage Typically 160 mV at 1.5 A (TPS75133Q)
  • Ultralow 75-μA Typical Quiescent Current
  • Fast Transient Response
  • 2% Tolerance Over Specified Conditions for Fixed-Output Versions
  • 20-Pin TSSOP PowerPAD? (PWP) Package
  • Thermal Shutdown Protection
  • APPLICATIONS
    • Telecom
    • Servers
    • DSP, FPGA Supplies

PowerPAD is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.

The TPS753xxQ and TPS751xxQ devices are low-dropout regulators with integrated power-on reset and power-good (PG) functions respectively. These devices are capable of supplying 1.5 A of output current with a dropout of 160 mV (TPS75133Q, TPS75333Q). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. These devices are designed to have fast transient response for larger load current changes.

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 160 mV at an output current of 1.5 A for the TPS75x33Q) and is directly proportional to the output current. Additionally, because the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 1.5 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.

The device is enabled when EN is connected to a low-level input voltage. This LDO family also features a sleep mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to less than 1 µA at TJ = +25°C.

For the TPS751xxQ, the power-good terminal (PG) is an active high, open drain output for use with a power-on reset or a low-battery indicator.

The RESET (SVS, POR, or power on reset) output of the TPS753xxQ initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS753xxQ monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage, RESET goes to a high-impedance state after a 100-ms delay. RESET goes to a logic-low state when the regulated output voltage is pulled below 95% (that is, during an overload condition) of its regulated voltage.

The TPS751xxQ and TPS753xxQ are offered in 1.5 V, 1.8 V, 2.5 V and 3.3 V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS751xxQ and TPS753xxQ families are available in a 20-pin TSSOP (PWP) package.

The TPS753xxQ and TPS751xxQ devices are low-dropout regulators with integrated power-on reset and power-good (PG) functions respectively. These devices are capable of supplying 1.5 A of output current with a dropout of 160 mV (TPS75133Q, TPS75333Q). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. These devices are designed to have fast transient response for larger load current changes.

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 160 mV at an output current of 1.5 A for the TPS75x33Q) and is directly proportional to the output current. Additionally, because the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 1.5 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.

The device is enabled when EN is connected to a low-level input voltage. This LDO family also features a sleep mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to less than 1 µA at TJ = +25°C.

For the TPS751xxQ, the power-good terminal (PG) is an active high, open drain output for use with a power-on reset or a low-battery indicator.

The RESET (SVS, POR, or power on reset) output of the TPS753xxQ initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS753xxQ monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage, RESET goes to a high-impedance state after a 100-ms delay. RESET goes to a logic-low state when the regulated output voltage is pulled below 95% (that is, during an overload condition) of its regulated voltage.

The TPS751xxQ and TPS753xxQ are offered in 1.5 V, 1.8 V, 2.5 V and 3.3 V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS751xxQ and TPS753xxQ families are available in a 20-pin TSSOP (PWP) package.

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* 數(shù)據(jù)表 Fast-Transient-Response 1.5-A Low-Dropout Voltage Regulators 數(shù)據(jù)表 (Rev. C) 2007年 10月 19日

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  • REACH
  • 器件標(biāo)識(shí)
  • 引腳鍍層/焊球材料
  • MSL 等級(jí)/回流焊峰值溫度
  • MTBF/時(shí)基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測(cè)
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