This section describes the available options to update the Clock time value. The DP83TC815-Q1 provides several mechanisms for updating the IEEE802.1AS clock based on the results of the synchronization protocol:

• Directly Read/Writable (Directly Setting or Reading the Time)
• Adjustable by Add/Subtract (Step-Time Adjustment)
• Frequency Scalable (Continuous Time Adjustment)
• Temporary Frequency Control (Temporary Time Adjustment)

Directly Read/Writable - Directly setting the system time clock to a value is accomplished by setting a new time in the clock registers (PTP_TDR). Initial setting of the clock/timer can require a direct write of a time value.

Adjustable by Add/Subtract - Time can also be adjusted by adding/subtracting a value to the present time value. For adding a value, the value has to be written to PTP_TDR register. For subtracting a value, the 32-bit 2’s complement representations of both seconds and nanoseconds fields can be written to PTP_TDR register. To add/subtract the following registers have to be written in the same order

1. Write Clock_time_ns[15:0] to PTP_TDR
2. Write Clock_time_ns[31:16] to PTP_TDR
3. Write Clock_time_sec[15:0] to PTP_TDR
4. Write Clock_time_sec[31:16] to PTP_TDR
5. Write to PTP_CTL with the 'Step PTP Clock' bit set

Frequency Scalable- The system can be set up to perform continuous time adjustment to the IEEE802.1AS PTP clock. Frequency (clock/timer rate) can be adjusted via register control to match the frequency of the leader. This is also called Permanent Rate Adjustment. The clock can be programmed to operate at an adjusted frequency value by programming a rate adjustment value. The rate adjustment allows for correction on the order of 2^-32 ns per reference clock cycle.

• Rate Adjustment - The clock can be programmed to operate at an adjusted frequency value by programming a rate adjustment value. The rate adjustment allows for correction on the order of 2^-32 ns per reference clock cycle. The frequency adjustment allows the clock to correct the offset over time, avoiding any potential side-effects caused by a step adjustment in the time value.

Temporary Frequency (Time) Control : Allows time correction by running at a modified frequency for a period of time. This is also called Temporary Rate Adjustment. The clock can be programmed to operate at a temporary adjusted frequency value by programming a rate adjustment value and duration. The rate adjustment allows for correction on the order of 2^-32 ns per reference clock cycle. The frequency adjustment allows the clock to correct the offset over time, avoiding any potential side-effects caused by a step adjustment in the time value. The clock can also be programmed to perform a temporary adjusted frequency value by including a rate adjustment duration.

Several mechanisms can be used to update the PHY’s IEEE802.1AS clock, based on the results of the synchronization protocol. The method used to update the clock value can depend on the difference in the time values. For example, at the initial synchronization attempt, the clocks can be very far apart, and therefore require a Step Adjustment or a Direct Time Set. Later, when clocks are very close in value, the Temporary Rate Adjustment method can be the best option.