In a typical Sleep-Wake cycle of an ECU, post wake-up, SoC/Host takes a long time to boot up. The PHY which needs registers to be programmed to link-up, doesn’t start the link-up process until SoC completes the boot-up phase. The link-up process of Ethernet PHY takes 100ms, before the link is ready for communication which adds up to the delay.

DP83TC815-Q1 supports custom Fast Wake-up feature to reduce the time delay from wake-up to communication ready. The image below shows the timing differences from wake-up to link-up, with and without Fast-Wake feature.

Figure 7-7 Fast Wake-Up Timing Block Diagram

DP83TC815-Q1 integrates low power consuming memory required to store register information across sleep and wake cycle. The register values stored in the memory are loaded automatically post wake and core power-up of the PHY. Since SoC/Host is not needed to program the registers, the PHY can be communication ready independently, thereby reducing the delay from wake to communication ready significantly.

The memory integrated in the VSLEEP domain so that the information is intact even when the core power supplies (VDDA, VDD1P0, VDDMAC/VDDIO) are turned-off during the sleep state. This memory is volatile and erased when VSLEEP power supply is turned-off.

The register values to be stored in the memory, must be programmed at least once when the core power supplies are turned-on. This means that the delay reduction can be seen only from the second sleep-wake cycle. The state transition diagram below illustrates the same.

Figure 7-8 Fast Wake-Up State Machine

Programming registers into the memory can be done any time before next sleep-negotiation either during link-up, standby mode, normal mode or during communication. Programming registers into the memory can be done even during subsequent sleep-wake cycles.

Procedure To Program The Memory:

• Power-Up VSLEEP. PHY goes into sleep state.
• Let the PHY wake-up from sleep using local or remote wake.
• Power-up core power supplies (VDDIO, VDDMAC, VDDA, VDD1P0)
• Let SoC boot-up.
• Program registers of the PHY and let the PHY link-up.
• Program register into the memory (any time during link-up or communication) by following the below sequence
  • Program the below registers in the same order to enable Fast Wake
    • 0x523 = 0x0001
    • 0x01D2 = 0x0004
    • 0x01D2 = 0x0014
    • 0x01D2 = 0x0004
    • Wait for at least 200 us
    • 0x01BE = 0x0560
  • For each register value to be stored, carry out the following sequence
    • 0x01BC = <Register Address to be stored>
    • 0x01BD = <Register Data to be stored>
    • 0x01BE = 0x0760
    • Wait for at least 200 us
• The memory is loaded and registers values are auto-loaded from the next wake cycle.

To clear the Memory at any point, assert pin reset (RESET_N = LOW) or program register 0x01BE = 0x0060.