SNLS779A July 2025 – November 2025 DP83TC815-Q1
PRODUCTION DATA
- 1
- 1 Features
- 2 Applications
- 3 Description
- 4 Device Comparison Table
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 IEEE802.1AS Features
- 7.3.2
TC10 Sleep Wake-up
- 7.3.2.1 Functions of the PHY for TC10 Support
- 7.3.2.2 Power Supply Networks for Sleep Applications
- 7.3.2.3 Configuration for Non-TC10 Applications
- 7.3.2.4 Miscellaneous Sleep Features
- 7.3.2.5 Fast Wake-up
- 7.3.3 PPM Monitor
- 7.3.4 Clock Dithering
- 7.3.5 Output Slew Control
- 7.3.6 Diagnostic Tool Kit
- 7.3.7 BIST and Loopback Modes
- 7.3.8 Compliance Test Modes
- 7.4 Device Functional Modes
- 7.5 Programming
- 8 Register Maps
- 9 Application and Implementation
- 10Device and Documentation Support
- 11Revision History
- 12Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RHA|36
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RHA|36
訂購信息
7.3.2.2 Power Supply Networks for Sleep Applications
DP83TC815-Q1 does not have any restrictions with respect to supply sequencing of VDD1P0, VSLEEP, VDDA, VDDIO/VDDMAC. The sleep functionality in the PHY is active immediately after the VLSEEP supply ramp is complete. The core functionality of the PHY is active 10ms after the last core power supply ramp is complete or after the device transitions from sleep to functional state whichever happens later.
The core supplies can be cut off in a system which requires the lowest current consumption in sleep mode. In Single Supply Mode, VDD1P0 is cut-off internal to the PHY and no external switch is required.
The image below shows some of the configurations of supply networks.
Figure 7-5 Core Supply Networks
The PHY doesn’t malfunction even if the supplies are not cutoff. But, the current consumption of the PHY from the core supplies are high. The table below shows the current comparison in sleep mode when supplies are cut off and when the supplies are intact.
| S.NO | SUPPLY | UNITS | CURRENT CONSUMPTION (Max) | |
|---|---|---|---|---|
| SUPPLIES CUT-OFF | SUPPLIES INTACT | |||
| 1 | VSLEEP | mA | 0.018 | 0.018 |
| 2 | VDDA | mA | 0 | 50 |
| 3 | VDDIO/VDDMAC (3.3V) | mA | 0 | 23 |
| 4 | Total Current | mA | 0.018 | 73 |
Many power supply networks share the PMIC between different PHYs available on the same PCB board to reduce the number of components and the board area.
In this case, the INH of the different PHYs can be connected together and this signal functions are Wired-OR (due to the open drain configuration of INH). The power supplies are cut-off only after all the PHYs are in sleep mode. Hence, there is high current consumption from the supplies even though one or some of the PHYs are in sleep. The functionality of the PHYs in sleep is affected during this case. To achieve the lowest power consumption in the above case, PMIC must be separated for both the PHYs.
The figure below shows one of the supply network examples where two PHYs share the same PMIC.
Figure 7-6 Power Network With Shared Core Supplies