For high dv/dt signals (switch pin traces): keep copper to a minimum to prevent making unintentional parallel plate capacitors with other traces or to a ground plane. Best to route signal and return on same layer.
For high di/dt signals: keep traces short, wide and closely spaced. This will reduce stray inductance and decrease the current loop area to help prevent EMI.
Always avoid vias when possible. They have high inductance and resistance. If vias are necessary always use more than one in parallel to decrease parasitics especially for power lines.
Keep input capacitor close to the IC with low inductance traces.
Keep the copper trace between a switch node and a diode as short and wide as possible.
Use single point grounding.
All AGND and PGND pins must be connected to the Power Pad.
Isolate analog signal paths from power paths.
Keep trace from switching node pin to inductor short: it reduces EMI emissions and noise that may couple into other portions of the converter.
Output voltage feedback sampling must be taken right at output capacitor and shielded.