SLVSBD1B December 2012 – August 2025 TPS65175
PRODUCTION DATA
The power-up sequence delays are programmable with a I2C. DLY0 can be set per steps of 3 ms, up to 24 ms. DLY1, DLY2 and DLY3 can be set per steps of 5 ms, up to 35 ms.
| DLY0 | |
| Number of bits: 3 Timing delay range: 3ms…24ms (± 20% accuracy) | |
| DLY1, 2, 3 | |
| Number of bits: 3 Timing delay range: 0ms…35ms (± 20% accuracy) | |