SLVSBD1B December 2012 – August 2025 TPS65175
PRODUCTION DATA
The REVERSE signal is used to select forward or reverse operation.
During forward operation (REVERSE = low), VGH_F = high, VGH_R = low and the clock signals are output in the following order:
(start of frame) 4 – 5 – 6 – 1 – 2 – 3 – 4 – 5 – 6 – 1 – 2 – 3 . . . . . 4 – 5 – 6 – 1 – 2 – 3 (end of frame)
During reverse operation (REVERSE = high), VGH_F = low, VGH_R = high and the clock signals are output in the following order:
(start of frame) 3 – 2 – 1 – 6 – 5 – 4 – 3 – 2 – 1 – 6 – 5 – 4 . . . . . 3 – 2 – 1 – 6 – 5 – 4 (end of frame)
The REVERSE pin is internally pulled down by a 100 kΩ (typical) resistor.
Figure 8-5 Timing Diagram: Normal Operation, Start of Frame
Figure 8-6 Timing Diagram: Normal Operation, End of Frame
Figure 8-7 Timing Diagram: Reverse Operation, Start of Frame
Figure 8-8 Timing Diagram: Reverse Operation, End of Frame