ZHCSUA9A March 2024 – February 2024 PCM6140-Q1
PRODUCTION DATA
本節提供了一個典型的 EVM I2C 寄存器控制腳本，其中顯示了如何將 PCM6140-Q1 設置為具有差分輸入的四通道模擬麥克風錄制模式。
# Key: w 98 XX YY ==> write to I2C address 0x98, to register 0xXX, data 0xYY
# # ==> comment delimiter
#
# The following list gives an example sequence of items that must be executed in the time
# between powering the device up and reading data from the device. Note that there are
# other valid sequences depending on which features are used.
#
# See the PCM6140-Q1EVM user guide for jumper settings and audio connections.
#
# Differential 4-channel : INP1/INM1 - Ch1, INP2/INM2 - Ch2, INP3/INM3 - Ch3 and INP4/INM4 - Ch4
# FSYNC = 44.1 kHz (Output Data Sample Rate), BCLK = 11.2896 MHz (BCLK/FSYNC = 256)
################################################################
#
#
# Power up IOVDD and AVDD power supplies keeping SHDNZ pin voltage LOW
# Wait for IOVDD and AVDD power supplies to settle to steady state operating voltage range.
# Release SHDNZ to HIGH.
# Wait for 1ms.
#
# Wake-up device by I2C write into P0_R2 using internal AREG
w 98 02?81
#
# Configure CH1_INSRC as analog Input by I2C write into P0_R60
w 98 3C 00
#
# Configure CH2_INSRC as analog Input by I2C write into P0_R65
w 98 41 00
#
# Configure CH3_INSRC as analog Input by I2C write into P0_R70
w 98 46 00
#
# Configure CH4_INSRC as analog Input by I2C write into P0_R75
w 98 4B 00
#
# Enable Input Ch-1 to Ch-4 by I2C write into P0_R115
w 98 73 F0
#
# Enable ASI Output Ch-1 to Ch-4 slots by I2C write into P0_R116
w 98 74 F0
#
# Power-up ADC, MICBIAS and PLL by I2C write into P0_R117
w 98 75 E0
#
# Apply FSYNC = 44.1 kHz and BCLK = 11.2896 MHz and
# Start recording data by host on ASI bus with TDM protocol 32-bits channel wordlength