ZHCSH28C September 2017 – May 2025 TPA3221
PRODUCTION DATA
- 1
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 Device Comparison Table
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Electrical Characteristics
- 6.6 Audio Characteristics (BTL)
- 6.7 Audio Characteristics (PBTL)
- Typical Characteristics, BTL Configuration, AD-mode
- Typical Characteristics, PBTL Configuration, AD-mode
- 7 Parameter Measurement Information
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagrams
- 8.3 Feature Description
- 8.4
Device Functional Modes
- 8.4.1 Powering Up
- 8.4.2 Powering Down
- 8.4.3 Device Reset
- 8.4.4 Device Soft Mute
- 8.4.5
Device Protection System
- 8.4.5.1 Overload and Short Circuit Current Protection
- 8.4.5.2 Signal Clipping and Pulse Injector
- 8.4.5.3 DC Speaker Protection
- 8.4.5.4 Pin-to-Pin Short Circuit Protection (PPSC)
- 8.4.5.5 Overtemperature Protection OTW and OTE
- 8.4.5.6 Undervoltage Protection (UVP) and Power-on Reset (POR)
- 8.4.5.7 Fault Handling
-
9 Application and Implementation
- 9.1 Application Information
- 9.2 Typical Applications
- 9.3 Power Supply Recommendations
- 9.4 Layout
- 10Device and Documentation Support
- 11Revision History
- 12Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DDV|44
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DDV|44
訂購信息
8.3.1 Internal LDO
TPA3221 has a built in optional LDO (Low dropout voltage regulator) to supply the analog and digital circuits as well as the gate drive for the output stages. The LDO can be used in systems where only the high voltage power rail is available, hence no additional power supply rails need to be generated for the TPA3221 to operate. As being a linear regulator, the LDO adds to the power losses of the device due to the (PVDD-5V) voltage drop and the supply current for AVDD and GVDD given in the Section 6.5 table.
Figure 8-2 Internal LDO for Single Supply SystemsWhen using the internal LDO in TPA3221 the VDD terminal is connected to a voltage source between 7V and PVDD. In a single supply system the VDD terminal is connected directly to the PVDD terminal. The LDO output is connected to the AVDD terminal, and can be used to supply the gate drive by supplying the GVDD from AVDD through a RC filter for best noise performance as shown in Figure 8-2.
Figure 8-3 Internal LDO Bypass for Highest Power EfficiencyFor highest system power efficiency the LDO can be bypassed by connecting VDD to an external 5V supply. In this configuration AVDD and GVDD is supplied by 5V from the external power supply. GVDD is supplied through a RC filter for best noise performance as shown in Figure 8-3.