ZHCSH28C September 2017 – May 2025 TPA3221
PRODUCTION DATA
- 1
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 Device Comparison Table
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Electrical Characteristics
- 6.6 Audio Characteristics (BTL)
- 6.7 Audio Characteristics (PBTL)
- Typical Characteristics, BTL Configuration, AD-mode
- Typical Characteristics, PBTL Configuration, AD-mode
- 7 Parameter Measurement Information
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagrams
- 8.3 Feature Description
- 8.4
Device Functional Modes
- 8.4.1 Powering Up
- 8.4.2 Powering Down
- 8.4.3 Device Reset
- 8.4.4 Device Soft Mute
- 8.4.5
Device Protection System
- 8.4.5.1 Overload and Short Circuit Current Protection
- 8.4.5.2 Signal Clipping and Pulse Injector
- 8.4.5.3 DC Speaker Protection
- 8.4.5.4 Pin-to-Pin Short Circuit Protection (PPSC)
- 8.4.5.5 Overtemperature Protection OTW and OTE
- 8.4.5.6 Undervoltage Protection (UVP) and Power-on Reset (POR)
- 8.4.5.7 Fault Handling
-
9 Application and Implementation
- 9.1 Application Information
- 9.2 Typical Applications
- 9.3 Power Supply Recommendations
- 9.4 Layout
- 10Device and Documentation Support
- 11Revision History
- 12Mechanical, Packaging, and Orderable Information
封裝選項
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DDV|44
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DDV|44
訂購信息
8.4.5.2 Signal Clipping and Pulse Injector
A built in activity detector monitors the PWM activity of the OUT_X pins. TPA3221 is designed to drive unclipped output signals all the way to PVDD and GND rails. In case of audio signal clipping when applying excessive input signal voltage, or in case of CB3C current protection being active, the amplifier feedback loop of the audio channel will respond to this condition with a saturated state, and the output PWM signals stops unless special circuitry is implemented to handle this situation. To prevent the output PWM signals from stopping in a clipping or CB3C situation, narrow pulses are injected to the gate drive to maintain output activity. The injected narrow pulses are injected at every 4th PWM frame, and thus the effective switching frequency during this state is reduced to 1/4 of the normal switching frequency.
Signal clipping is signalled on the OTW_CLIP pin and is self clearing when signal level reduces and the device reverts to normal operation. The OTW_CLIP pulses starts at the onset to output clipping, typically at a THD level around 0.01%, resulting in narrow OTW_CLIP pulses starting with a pulse width of ~500ns.
Figure 8-23 Signal Clipping PWM and Speaker Output Signals