ZHCSH28C September 2017 – May 2025 TPA3221
PRODUCTION DATA
- 1
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 Device Comparison Table
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Electrical Characteristics
- 6.6 Audio Characteristics (BTL)
- 6.7 Audio Characteristics (PBTL)
- Typical Characteristics, BTL Configuration, AD-mode
- Typical Characteristics, PBTL Configuration, AD-mode
- 7 Parameter Measurement Information
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagrams
- 8.3 Feature Description
- 8.4
Device Functional Modes
- 8.4.1 Powering Up
- 8.4.2 Powering Down
- 8.4.3 Device Reset
- 8.4.4 Device Soft Mute
- 8.4.5
Device Protection System
- 8.4.5.1 Overload and Short Circuit Current Protection
- 8.4.5.2 Signal Clipping and Pulse Injector
- 8.4.5.3 DC Speaker Protection
- 8.4.5.4 Pin-to-Pin Short Circuit Protection (PPSC)
- 8.4.5.5 Overtemperature Protection OTW and OTE
- 8.4.5.6 Undervoltage Protection (UVP) and Power-on Reset (POR)
- 8.4.5.7 Fault Handling
-
9 Application and Implementation
- 9.1 Application Information
- 9.2 Typical Applications
- 9.3 Power Supply Recommendations
- 9.4 Layout
- 10Device and Documentation Support
- 11Revision History
- 12Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DDV|44
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DDV|44
訂購信息
8.4.5.1 Overload and Short Circuit Current Protection
TPA3221 has fast reacting current sensors on all high-side and low-side FETs. To prevent output current from increasing beyond the overcurrent threshold, TPA3221 uses current limiting of the output current for each switching cycle (Cycle By Cycle Current Control, CB3C) in case of excess output current. CB3C prevents premature shutdown due to high output current transients caused by high level music transients and a drop of real speaker’s load impedance, and allows the output current to be limited to a maximum programmed level. If the maximum output current persists, i.e. the power stage being overloaded with too low load impedance, the device will shut down the affected output channel and the affected output is put in a high-impedance (Hi- Z) state until a RESET cycle is initiated. CB3C works individually for each full-bridge output. If an over current event is triggered, CB3C performs a state flip of the full-bridged output that is cleared upon beginning of next PWM frame.
Figure 8-22 CB3C Timing Example