ZHCSFY3B November 2016 – February 2019 TAS2559
PRODUCTION DATA.
This register controls device power up
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| PWR_DSP | PWR_PLL | PWR_NDIV | PWR_MDAC | PWR_MADC | Reserved | Reserved | PWR_ERR |
| RW-0h | RW-0h | RW-0h | RW-0h | RW-0h | RW-0h | RW-0h | RW-0h |
| LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 7 | PWR_DSP | RW | 0h | DSP is
0 = Powered-down 1 = Powered-up |
| 6 | PWR_PLL | RW | 0h | PLL is
0 = Powered-down 1 = Powered-up |
| 5 | PWR_NDIV | RW | 0h | NDIV is
0 = Powered-down 1 = Powered-up |
| 4 | PWR_MDAC | RW | 0h | MDAC is
0 = Powered-down 1 = Powered-up |
| 3 | PWR_MADC | RW | 0h | MADC is
0 = Powered-down 1 = Powered-up |
| 2 | Reserved | RW | 0h | Reserved |
| 1 | Reserved | RW | 0h | Reserved |
| 0 | PWR_ERR | RW | 0h | Reports when a VBAT brownout or clock halt condition was detected. When this is detected several internal blocks are powered down. This register must be cleared first before re-power device. Reason for error is indicated in interrupt register.
0 = No error condition 1 = Error condition detected |