ZHCSFY3B November 2016 – February 2019 TAS2559
PRODUCTION DATA.
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
Configures the clock error detection timeouts
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| Reserved | Reserved | Reserved | CE1_STO[2:0] | ||||
| RW-0h | RW-0h | RW-2h | RW-7h | ||||
| LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 7 | Reserved | RW | 0h | Reserved |
| 6 | Reserved | RW | 0h | Reserved |
| 5-3 | Reserved | RW | 2h | Reserved |
| 2-0 | CE1_STO[2:0] | RW | 7h | Clock error detection block 1 will shutdown the device and set signal PWR_ERR if a clock input does not occur for
0 = 2.73 ms 1 = 22 ms 2 = 44 ms 3 = 87ms 4 = 174 ms 5 = 350 ms 6 = 700 ms 7 = 1.4s |