ZHCSCK8H May 2014 – April 2025 LP8860-Q1
PRODUCTION DATA
| MIN | NOM | MAX | UNIT | ||
|---|---|---|---|---|---|
| 1 | Cycle time | 70 | ns | ||
| 2 | Enable lead time | 35 | ns | ||
| 3 | Enable lag time | 35 | ns | ||
| 4 | Clock low time | 35 | ns | ||
| 5 | Clock high time | 35 | ns | ||
| 6 | Data setup time | 20 | ns | ||
| 7 | Data hold time | 20 | ns | ||
| 8 | Disable time | 10 | ns | ||
| 9 | Data valid | 29 | ns | ||
| 10 | NSS inactive time | 700 | ns | ||
| Cb | Bus capacitance | 5 | 40 | pF | |
Figure 5-1 I2C Timing
Figure 5-2 SPI
Timing Diagram