ZHCSCK8H May 2014 – April 2025 LP8860-Q1
PRODUCTION DATA
Address 0x03
Reset value loaded during start-up from EEPROM REG1
| DISP_CL1_CURRENT LSB | |||||||
|---|---|---|---|---|---|---|---|
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| DISP_CL1_CURRENT[7:0] | |||||||
| Name | Bit | Access | Description | ||||
|---|---|---|---|---|---|---|---|
| DISP_CL1_CURRENT[7:0] | 7:0 | R/W | Display/Cluster current control LSB | ||||
The DISP_CL1_CURRENT MSB register must be written first. New value is valid after writing DISP_CL1_CURRENT LSB. If one of few outputs is used in display mode, the DISP_CL1_CURRENT register is used for all outputs in display mode (12-bit), otherwise it is Cluster1 Output Current register.
Maximum current is defined by DRV_LED_CURRENT_SCALE[2:0] bits.