SPRZ398K November 2012 – September 2024 DRA745 , DRA746 , DRA750 , DRA756
DSS VOUT3 on VDDSHV6 Domain (vin1a Pins) Should Not Be Used in 3.3V Mode
High
When the VOUT3 interface is mapped to VDDSHV6 supply domain (i.e., muxed on vin1a pins) and is used in 3.3V mode of operation there can be excessive overshoot/undershoot on the IOs when the interface data bus switches concurrently. This can impact the long term reliability of the SoC.
The VOUT3 interface should not be used in 3.3V mode of operation when mapped to the VDDSHV6 domain (i.e., muxed on the vin1a pins).
A different pin mux option should be chosen. Options include using VOUT3 on the VDDSHV10 domain (muxed with gpmc pins) or using a different video port (VOUT1, VOUT2).
If a different pin mux option is not possible, then VOUT3 can be used in 1.8 V mode without impacting long-term reliability of the SoC. A level shifter can be implemented on the board to convert between 1.8V levels on the SoC side and 3.3V levels if needed by the external component.
SR 2.0, 1.1, 1.0
TDA2x: 2.0, 1.1, 1.0
DRA75x, DRA74x: 2.0, 1.1, 1.0
AM572x: 2.0, 1.1