SLVSHR0 May 2025 TPS2HCS08-Q1
PRODUCTION DATA
- 1
- 1 Features
- 2 Applications
- 3 Description
- 4 Device Comparison Table
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Parameter Measurement Information
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3 Device Functional Modes
- 8.4
Feature Description
- 8.4.1 Protection Mechanisms
- 8.4.2 Diagnostic Mechanisms
- 8.5 Parallel Mode Operation
- 8.6 TPS2HCS08 Registers
- 9 Application and Implementation
- 10Device and Documentation Support
- 11Revision History
- 12Mechanical, Packaging, and Orderable Information
封裝選項
機械數(shù)據(jù) (封裝 | 引腳)
- PWP|16
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
- PWP|16
訂購信息
9.4.2 Layout Example
Figure 9-5 and Figure 9-6 below show example PCB layouts with and without a GND network, respectively. TI recommends that the IO signals that connect to the microcontroller be routed to a via and then through an internal PCB layer. For TPS2HCS08B-Q1 device, DI and LHI pins in the below example PCB layouts would be replaced with DI1 and DI2 pins, respectively.
Figure 9-5 Layout Example with Ground
Network
Figure 9-6 Layout Example without Ground
Network