The TPS2HCS08-Q1 device offers a SLEEP state where the device is placed into an ultra low current consumption state. When the device is in SLEEP state, both channels are OFF, registers are cleared, and all digital circuits are powered off. The device will transition to this state if VBB < VBB_UVLO and VDD < VDD_UVLO or if VDD drops below VDD_UVLO while in either MANUAL_LPM or AUTO_LPM state. The device can manually be put into SLEEP state by writing a 1 to the SLEEP bit in the SLEEP register.

The device can be woken from the SLEEP state through the CSN pin going low. There are two methods to wake the device up from SLEEP through the CSN pin:

1. Pulse the CSN pin low for t < t_READY
2. Hold the CSN pin low for at least t_READY and continue to hold CSN pin low through the first SPI transaction

Both methods above will result in the device waking up without a SPI_ERR fault. A dummy SPI transaction could be used to sastify method #1 if the dummy SPI transaction is completed in t < t_READY. Figure 8-13 below shows examples of the two proper wakeup scenarios which will result in no SPI_ERR fault and one improper wakeup scenario which will result in a SPI_ERR fault.

Upon wakeup from SLEEP state, the values in the registers will be set to their reset values detailed in the register map below. Additionally, the FLT pin will be asserted low and the POR, VDD_UVLO, and VBB_UVLO fault bits will be asserted and will be cleared when the GLOBAL_FAULT_TYPE register is read if none of these faults currently exist when read.

Figure 8-13 Startup Communication Timing