SLVSHR0 May 2025 TPS2HCS08-Q1
PRODUCTION DATA
The MANUAL_LPM state provides a mode where the system can manually put the device into a low IQ state while keeping the channels on, if desired, and protected through short-circuit protection. To enter the MANUAL_LPM state the LPM bit in the LPM register needs to be set to 1. Depending on the version, before the LPM command is written to enter MANUAL_LPM the device needs to meet the following conditons:
If the above conditions are not met the device will not transition to the MANUAL_LPM state and the MANUAL_LPM_ENTRY bit will be set back to 0 and the LPM_STATUS bit in the SDO frame will remain 0. If all conditions are met and 1 is written to the LPM bit the device will update the LPM_STATUS bit in the SDO frame and then will transition to the MANUAL_LPM state in tLPM_ENTRY.
In the MANUAL_LPM state, the smaller internal FET is used to provide the lowest IQ. The RON for the smaller FET is defined by the RON,LPM_MAN in the electrical characteristics section. Given the smaller FET is used in MANUAL_LPM, the exit thresholds and the short-circuit thresholds will be lower compared to the AUTO_LPM state where the larger internal FET is used.
For TPS2HCS08A-Q1, the MCU or controller can write a 0 to the LPM bit in the LPM register to manually transition the device out of MANUAL_LPM state to the ACTIVE state. The device will evaluate the AUTO_LPM_EXIT_CHx bits when a 0 is written to the LPM bit to exit the MANUAL_LPM state. If either AUTO_LPM_EXIT_CHx are 1 then the corresponding channel will be enabled if not already enabled when the device is in ACTIVE state.
For TPS2HCS08B-Q1, the MCU or controller can also write a 0 to the LPM bit in the LPM register to manually transition the device out of MANUAL_LPM state to the ACTIVE state except the TPS2HCS08B-Q1 device will not evaluate the AUTO_LPM_EXIT_CHx bits. The AUTO_LPM_EXIT_CHx bits have no effect on the TPS2HCS08B-Q1. The TPS2HCS08B-Q1 will also transition out of the MANUAL_LPM state to ACTIVE state if DI1 or DI2 change states in MANUAL_LPM state.
When in MANUAL_LPM state, the device will wake itself up and the system through the FLT / WAKE_SIG pin when there is a load current increase beyond the programmed IEXIT_LPM_MAN threshold. The FLT / WAKE_SIG pin will pulse low for tWAKE_SIG to alert the system that the device has exited MANUAL_LPM and transitioned to the ACTIVE state. The threshold to switchover for each channel can be programmed through the MAN_LPM_EXIT_CURR_CHx bits to the following wake up settings detailed in Table 8-9.
If there is a larger ECU load current demand increase or output short circuit above the ISCP_LPM_MAN, the device will turn off the smaller internal FET for that channel and will retry with the larger MOSFET in tRETRY_LPM with IOCP set as the overcurrent protection threshold.
The additional load current demand and the transition to the active state is signaled to the MCU or the System Basis Chip (SBC) with a falling edge of the FLT or WAKE_SIG (active low pull-up resistor to VDD) that can be used as an interrupt by the MCU or the SBC to wake up the system. The device can then be polled over SPI to see if the FLT or WAKE_SIG pin transition was caused by the load ECU current demand or a short circuit. The device registers a fault as over-current protection fault only if the overcurrent is also confirmed in the ACTIVE state.
Depending on the load step magnitude, the device will transition to the ACTIVE state in different ways. Figure 8-14, Figure 8-15, and Figure 8-16 showcase how the device responds to different load step magnitudes.
Once the device transitions to ACTIVE because of a load current increase, the LPM bit in the LPM register remains set to 1. To go to LPM state again, the LPM bit in the LPM register needs to be set to 0 and then to 1 again.
| MAN_LPM_EXIT_CURR_CHx in LPM register | Typ | Unit |
|---|---|---|
| 00 (default) | 0.53 | A |
| 01 | 0.7 | A |
| 10 | 0.165 | A |
| 11 | 0.35 | A |