ZHCSV76A June 2022 – March 2024 TMS570LC4357-SEP
PRODUCTION DATA
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
| CLOCK SOURCE[3:0] | CLOCK NAME |
|---|---|
| Others | Oscillator (OSCIN) |
| 0x5 | High-frequency LPO |
| 0xA | Test clock (TCK) |
| KEY[3:0] | CLOCK SOURCE[3:0] | CLOCK NAME |
|---|---|---|
| Others | – | N2HET1[31] |
| 0x0 | Main PLL free-running clock output | |
| 0x1 | PLL #2 free-running clock output | |
| 0x2 | Low-frequency LPO | |
| 0xA | 0x3 | High-frequency LPO |
| 0x4 | Reserved | |
| 0x5 | EXTCLKIN1 | |
| 0x6 | EXTCLKIN2 | |
| 0x7 | Reserved | |
| 0x8 - 0xF | VCLK |
| CLOCK SOURCE[3:0] | CLOCK NAME |
|---|---|
| Others | Oscillator (OSCIN) |
| 0xA | Test clock (TCK) |
| KEY[3:0] | CLOCK SOURCE[3:0] | CLOCK NAME |
|---|---|---|
| Others | – | N2HET2[0] |
| 0xA | 0x1 | PLL2_post_ODCLK/8 |
| 0x2 | PLL2_post_ODCLK/16 | |
| 0x3 - 0x7 | Reserved | |
| 0x8 - 0xF | VCLK |