ZHCSV76A June 2022 – March 2024 TMS570LC4357-SEP
PRODUCTION DATA
The MibADC has a separate power bus for its analog circuitry that enhances the Analog-to-Digital (A-to-D) performance by preventing digital switching noise on the logic circuitry which could be present on VSS and VCC from coupling into the A-to-D analog stage. All A-to-D specifications are given with respect to ADREFLO, unless otherwise noted.
| DESCRIPTION | VALUE |
|---|---|
| Resolution | 12 bits |
| Monotonic | Assured |
| Output conversion code | 00h to FFFh [00 for VAI ≤ ADREFLO; FFF for VAI ≥ ADREFHI] |