SLUSFZ6 September 2025 UCC218915-Q1
ADVANCE INFORMATION
請參考 PDF 數據表獲取器件具體的封裝圖。
The input pins to the UCC218915-Q1 are both 3.3V and 5V logic compatible. The IN+ and RST/EN pins have internal pull-down resistors, and the IN- pin has an internal pull-up resistor. If any of these pins are left floating the driver will be disabled. The driver has both inverting and non-inverting PWM input pins. If only the non-inverting IN+ input is used, tie IN- to GND. If only the inverting IN- input is used, tie IN+ to VCC. Both IN+ and IN- can be used for PWM interlocking with the other driver in a half-bridge configuration to prevent phase leg shoot-through.
The device features 25ns typical internal deglitch filters on the IN+, IN-, and RST/EN pins in order to protect against unintentional switching due to noise transients or narrow PWM pulses. Any signal less than 25ns will be filtered out and not passed through. For noisy systems, external low pass filters can be added externally to the input pins to further increase noise immunity. When choosing low pass filter components, both noise immunity and delay time should be considered according to system requirements. Figure 6-3 shows the impact of the deglitch filters with narrow pulses on IN+, IN-, and RST/EN.