| 12 |
Options |
See Figure 6-41 |
| 14 |
Lane Setup |
See Table 6-85 |
| 16 |
Reserved |
Reserved |
| 18 |
Node ID |
The node ID value to set for this device |
| 20 |
SERDES ref clk |
The SERDES reference clock frequency, in 1/100 MHZ. Used only if PLL setup field in options is set. |
| 22 |
Link Rate |
Link rate, MHz. Used only if PLL setup field in options is set. |
| 24 |
PF Low |
Packet forward address range, low value |
| 26 |
PF high |
Packet forward address range, high value |
| 28 |
Promiscuous Mask |
A bit is set for each lane/port that is configured as promiscuous. |
| 30 |
Serdes AUX, MSW |
Serdes Auxillary Register Configuration, MSW |
| 32 |
Serdes AUX, LSW |
Serdes Auxillary Register Configuration, LSW |
| 34 |
SERDES Rx Lane 0, MSW |
Serdes Rx Config, Lane 0, MSW |
| 36 |
SERDES Rx Lane 0, LSW |
Serdes Rx Config, Lane 0, LSW |
| 38 |
SERDES Rx Lane 1, MSW |
Serdes Rx Config, Lane 1, MSW |
| 40 |
SERDES Rx Lane 1, LSW |
Serdes Rx Config, Lane 1, LSW |
| 42 |
SERDES Rx Lane 2, MSW |
Serdes Rx Config, Lane 2, MSW |
| 44 |
SERDES Rx Lane 2, LSW |
Serdes Rx Config, Lane 2, LSW |
| 46 |
SERDES Rx Lane 3, MSW |
Serdes Rx Config, Lane 3, MSW |
| 48 |
SERDES Rx Lane 3, LSW |
Serdes Rx Config, Lane 3, LSW |
| 50 |
SERDES Tx Lane 0, MSW |
Serdes Tx Config, Lane 0, MSW |
| 52 |
SERDES Tx Lane 0, LSW |
Serdes Tx Config, Lane 0, LSW |
| 54 |
SERDES Tx Lane 1, MSW |
Serdes Tx Config, Lane 1, MSW |
| 56 |
SERDES Tx Lane 1, LSW |
Serdes Tx Config, Lane 1, LSW |
| 58 |
SERDES Tx Lane 2, MSW |
Serdes Tx Config, Lane 2, MSW |
| 60 |
SERDES Tx Lane 2, LSW |
Serdes Tx Config, Lane 2, LSW |
| 62 |
SERDES Tx Lane 3, MSW |
Serdes Tx Config, Lane 3, MSW |
| 64 |
SERDES Tx Lane 3, LSW |
Serdes Tx Config, Lane 3, LSW |