| 12 |
Options |
See Figure 6-42 |
| 14 |
MAC High |
The 16 MSBs of the MAC address to receive during boot |
| 16 |
MAC Med |
The 16 middle bits of the MAC address to receive during boot |
| 18 |
MAC Low |
The 16 LSBs of the MAC address to receive during boot |
| 20 |
Multi MAC High |
The 16 MSBs of the multicast MAC address to receive during boot |
| 22 |
Multi MAC Med |
The 16 middle bits of the multicast MAC address to receive during boot |
| 24 |
Mulit MAC Low |
The 16 LSBs of the multicast MAC address to receive during boot |
| 26 |
Source Port |
The source UDP port to accept boot packets from. A value of 0 will accept packets from any UDP port |
| 28 |
Dest Port |
The destination port to accept boot packets on. |
| 30 |
Device ID 12 |
The first 2 bytes of the device ID. This is typically a string value, and is sent in the Ethernet ready frame |
| 32 |
Device ID 34 |
The second 2 bytes of the device ID. |
| 34 |
Dest MAC High |
The 16 MSBs of the MAC destination address used for the Ethernet ready frame. Default is broadcast. |
| 36 |
Dest MAC Med |
The 16 middle bits of the MAC destination address |
| 38 |
DEST MAC Low |
The 16 LSBs of the MAC destination address |
| 40 |
Sgmii Config |
See Figure 6-43 |
| 42 |
Sgmii Control |
The SGMII control register value (if table value not used) |
| 44 |
Sgmii Adv Abilility |
The SGMII ADV Ability register value (if table value not used) |
| 46 |
Sgmii Tx Cfg High |
The 16 MSBs of the sgmii Tx config register (if table value not used) |
| 48 |
Sgmii Tx Cfg Low |
The 16 LSBs of the sgmii Tx config register (if table value not used) |
| 50 |
Sgmii Rx Cfg High |
The 16 MSBs of the sgmii Rx config register (if table value not used) |
| 52 |
Sgmii Rx Cfg Low |
The 16 LSBs of the sgmii Rx config register (if table value not used) |
| 54 |
Sgmii Aux Cfg High |
The 16 MSBs of the sgmii Aux config register (if table value not used) |
| 56 |
Sgmii Aux Cfg Low |
The 16 LSBs of the sgmii Aux config register (if table value not used) |
| 58 |
Pkt PLL Config, MSW |
The packet subsystem PLL configuration, MSW (unused in gauss) |
| 60 |
Packet PLL Config, LSW |
The packet subsystem PLL configuration, LSW |