ZHCSHD7A January 2018 – April 2020 ADC12DJ2700
PRODUCTION DATA.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | TAD_RAMP_RATE | TAD_RAMP_EN | |||||
| R/W-0000 00 | R/W-0 | R/W-0 | |||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 7-2 | RESERVED | R/W | 0000 00 | RESERVED |
| 1 | TAD_RAMP_RATE | R/W | 0 | Specifies the ramp rate for the TAD[15:8] output when the TAD[15:8] register is written when TAD_RAMP_EN = 1.
0: TAD[15:8] ramps up or down one code per 256 DEVCLK cycles. 1: TAD[15:8] ramps up or down 4 codes per 256 DEVCLK cycles. |
| 0 | TAD_RAMP_EN | R/W | 0 | TAD ramp enable. Set this bit if coarse TAD adjustments are desired to ramp up or down instead of changing abruptly.
0: After writing the TAD[15:8] register the aperture delay is updated within 1024 DEVCLK cycles 1: After writing the TAD[15:8] register the aperture delay ramps up or down until the aperture delay matches the TAD[15:8] register |