SPRZ450B February 2018 – September 2024 DRA74P , DRA75P , DRA76P , DRA77P
DSP MStandby Requires CD_EMU in SW_WKUP
Low
Issue is seen to come when there is need to place the DSP subsystem to a low power state.
The DSP requires the internal emulation clock to be actively toggling in order to successfully enter a low power mode via execution of the IDLE instruction and PRCM MStandby/Idle handshake. This assumes that other prerequisites and software sequence are followed.
The CD_EMU domain can be set in SW_WKUP mode via the CM_EMU_CLKSTCTRL[1:0]CLKTRCTRL field.
The emulation clock to the DSP is free-running anytime CCS is connected via JTAG? debugger to the DSP subsystem or when the CD_EMU clock domain is set in SW_WKUP mode.
Note: If it is sure that the DSP would never enter any low power state (in other words the DSP would never execute IDLE instruction), the workaround can be ignored.
SR 1.0
AM574x: 1.0
DRA75xP, DRA74xP, DRA77xP, DRA76xP: 1.0
TDA2Px: 1.0
AM576x: 1.0