SPNS253A May 2018 – September 2019 TMS570LC4357-EP
PRODUCTION DATA.
The Embedded Cross Trigger (ECT) is a modular component that supports the interaction and synchronization of multiple triggering events within a SoC.
The ECT consists of two modules:
Figure 5-24 CTI/CTM Integration
Figure 5-25 CTI1 Mapping NOTE
ETM-R5, Cortex-R5F and CTI1 run at same frequency.
| CTI TRIGGER | Module Signal |
|---|---|
| Trigger Input 0 | From Cortex-R5F DBTRIGGER |
| Trigger Input 1 | From Cortex-R5F nPMUIRQ |
| Trigger Input 2 | From ETM-R5 EXTOUT[0] |
| Trigger Input 3 | From ETM-R5 EXTOUT[1] |
| Trigger Input 4 | From Cortex-R5F COMMRX |
| Trigger Input 5 | From Cortex-R5F COMMTX |
| Trigger Input 6 | From ETM-R5 TRIGGER |
| Trigger Input 7 | From Cortex-R5F DBTRIGGER |
| Trigger Output 0 | To Cortex-R5F EDBGRQ |
| Trigger Output 1 | To ETM-R5 EXTIN[0] |
| Trigger Output 2 | To ETM-R5 EXTIN[1] |
| Trigger Output 3 | To Cortex-R5F nIRQ |
| Trigger Output 4 | Reserved |
| Trigger Output 5 | Reserved |
| Trigger Output 6 | Reserved |
| Trigger Output 7 | To Cortex-R5F DBGRESTARTED |
Figure 5-26 CTI3 Mapping NOTE
TPIU and CTI3 run at different frequencies.
| CTI TRIGGER | Module Signal |
|---|---|
| Trigger Input 0 | Reserved |
| Trigger Input 1 | Reserved |
| Trigger Input 2 | Reserved |
| Trigger Input 3 | Reserved |
| Trigger Input 4 | Reserved |
| Trigger Input 5 | Reserved |
| Trigger Input 6 | Reserved |
| Trigger Input 7 | Reserved |
| Trigger Output 0 | To TPIU TRIGIN |
| Trigger Output 1 | To TPIU FLUSHIN |
| Trigger Output 2 | Reserved |
| Trigger Output 3 | Reserved |
| Trigger Output 4 | Reserved |
| Trigger Output 5 | Reserved |
| Trigger Output 6 | Reserved |
| Trigger Output 7 | Reserved |
Figure 5-27 CTI4 Mapping | CTI TRIGGER | Module Signal |
|---|---|
| Trigger Input 0 | From DMA_DBGREQ |
| Trigger Input 1 | From N2HET1_DBGREQ |
| Trigger Input 2 | From N2HET2_DBGREQ |
| Trigger Input 3 | From HTU1_DBGREQ |
| Trigger Input 4 | From HTU2_DBGREQ |
| Trigger Input 5 | From DMA_DBGREQ |
| Trigger Input 6 | From N2HET1_DBGREQ or HTU1_DBGREQ |
| Trigger Input 7 | From N2HET2_DBGREQ or HTU2_DBGREQ |
| Trigger Output 0 | To SYS_MODULE_TRIGGER |
| Trigger Output 1 | To USER_PERIPHERAL_TRIGGER1 |
| Trigger Output 2 | To USER_PERIPHERAL_TRIGGER2 |
| Trigger Output 3 | To USER_PERIPHERAL_TRIGGER3 |
| Trigger Output 4 | To IcePick Debug_Attention |
| Trigger Output 5 | Reserved |
| Trigger Output 6 | Reserved |
| Trigger Output 7 | Reserved |
| TRIGGER OUTPUT | MODULE SIGNAL CONNECTED | DESCRIPTION |
|---|---|---|
| SYS_MODULE_TRIGGER | L2FMC_CPU_EMUSUSP | L2FMC Wrapper Suspend |
| CCM_R5_CPU_EMUSUSP | CCM_R5 module suspend | |
| CRC_CPU_EMUSUSP | CRC1 / CRC2 module suspend | |
| SYS_CPU_EMUSUSP | SYS module Suspend | |
| USER_PERIPHERAL_TRIGGER1 | DMA_SUSPEND | DMA Suspend |
| RTI_CPU_SUSPEND | RTI1 / RTI2 Suspend | |
| AWM_CPU_SUSPEND | AWM1 / AWM2 Suspend | |
| HTU_CPU_EMUSUSP | HTU1 / HTU2 Suspend | |
| SCI_CPU_EMUSUSP | SCI3 / SCI4 Suspend | |
| LIN_CPU_EMUSUSP | LIN1 / LIN2 Suspend | |
| I2C_CPU_EMUSUSP | I2C1 / I2C2 Suspend | |
| EMAC_CPU_EMUSUSP | EMAC Suspend | |
| EQEP_CPU_EMUSUSP | EQEP Suspend | |
| ECAP_CPU_EMUSUSP | ECAP Suspend | |
| DMM_CPU_EMUSUSP | DMM Suspend | |
| DCC_CPU_EMUSUSP | DCC1 / DCC2 Suspend | |
| USER_PERIPHERAL_TRIGGER2 | DCAN_CPU_EMUSUSP | DCAN1 / DCAN2 / DCAN3 / DCAN4 Suspend |
| USER_PERIPHERAL_TRIGGER3 | ePWM_CPU_EMUSUSP | ePWM1..7 Trip Zone TZ6n and ePWM1..7 Suspend |