TMS570LC4357-EP

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增強(qiáng)型產(chǎn)品 16/32 位 RISC 閃存 MCU、Arm Cortex-R5F、EMAC、FlexRay

產(chǎn)品詳情

Frequency (MHz) 300 Flash memory (kByte) 4096 RAM (kByte) 512 ADC type 2 12-bit SAR Number of GPIOs 168 UART 4 Features Hercules high-performance microcontroller Operating system AutoSAR, FreeRTOS, SafeRTOS TI functional safety category Functional Safety-Compliant Operating temperature range (°C) -55 to 125 Ethernet Yes PWM (Ch) 78 CAN (#) 4 Power supply solution TPS65381A-Q1 Communication interface CAN, Ethernet, FlexRay, SPI, UART Rating HiRel Enhanced Product
Frequency (MHz) 300 Flash memory (kByte) 4096 RAM (kByte) 512 ADC type 2 12-bit SAR Number of GPIOs 168 UART 4 Features Hercules high-performance microcontroller Operating system AutoSAR, FreeRTOS, SafeRTOS TI functional safety category Functional Safety-Compliant Operating temperature range (°C) -55 to 125 Ethernet Yes PWM (Ch) 78 CAN (#) 4 Power supply solution TPS65381A-Q1 Communication interface CAN, Ethernet, FlexRay, SPI, UART Rating HiRel Enhanced Product
NFBGA (GWT) 337 256 mm2 16 x 16
  • High-Performance Automotive-Grade Microcontroller for Safety-Critical Applications
    • Dual-Core Lockstep CPUs With ECC-Protected Caches
    • ECC on Flash and RAM Interfaces
    • Built-In Self-Test (BIST) for CPU, High-End Timers, and On-Chip RAMs
    • Error Signaling Module (ESM) With Error Pin
    • Voltage and Clock Monitoring
  • ARM? Cortex? - R5F 32-Bit RISC CPU
    • 1.66 DMIPS/MHz With 8-Stage Pipeline
    • FPU With Single- and Double-Precision
    • 16-Region Memory Protection Unit (MPU)
    • 32KB of Instruction and 32KB of Data Caches With ECC
    • Open Architecture With Third-Party Support
  • Operating Conditions
    • Up to 300-MHz CPU Clock
    • Core Supply Voltage (VCC): 1.14 to 1.32 V
    • I/O Supply Voltage (VCCIO): 3.0 to 3.6 V
  • Integrated Memory
    • 4MB of Program Flash With ECC
    • 512KB of RAM With ECC
    • 128KB of Data Flash for Emulated EEPROM With ECC
  • 16-Bit External Memory Interface (EMIF)
  • Hercules? Common Platform Architecture
    • Consistent Memory Map Across Family
    • Real-Time Interrupt (RTI) Timer (OS Timer)
    • Two 128-Channel Vectored Interrupt Modules (VIMs) With ECC Protection on Vector Table
      • VIM1 and VIM2 in Safety Lockstep Mode
    • Two 2-Channel Cyclic Redundancy Checker (CRC) Modules
  • Direct Memory Access (DMA) Controller
    • 32 Channels and 48 Peripheral Requests
    • ECC Protection for Control Packet RAM
    • DMA Accesses Protected by Dedicated MPU
  • Frequency-Modulated Phase-Locked Loop (FMPLL) With Built-In Slip Detector
  • Separate Nonmodulating PLL
  • IEEE 1149.1 JTAG, Boundary Scan, and ARM CoreSight? Components
  • Advanced JTAG Security Module (AJSM) 
  • Trace and Calibration Capabilities
    • ETM?, RTP, DMM, POM
  • Multiple Communication Interfaces
    • 10/100 Mbps Ethernet MAC (EMAC)
      • IEEE 802.3 Compliant (3.3-V I/O Only)
      • Supports MII, RMII, and MDIO
    • FlexRay Controller With 2 Channels
      • 8KB of Message RAM With ECC Protection
      • Dedicated FlexRay Transfer Unit (FTU)
    • Four CAN Controller (DCAN) Modules
      • 64 Mailboxes, Each With ECC Protection
      • Compliant to CAN Protocol Version 2.0B
    • Two Inter-Integrated Circuit (I2C) Modules
    • Five Multibuffered Serial Peripheral Interface (MibSPI) Modules
      • MibSPI1: 256 Words With ECC Protection
      • Other MibSPIs: 128 Words With ECC Protection
    • Four UART (SCI) Interfaces, Two With Local Interconnect Network (LIN 2.1) Interface Support
  • Two Next Generation High-End Timer (N2HET) Modules
    • 32 Programmable Channels Each
    • 256-Word Instruction RAM With Parity
    • Hardware Angle Generator for Each N2HET
    • Dedicated High-End Timer Transfer Unit (HTU) for Each N2HET
  • Two 12-Bit Multibuffered Analog-to-Digital Converter (MibADC) Modules
    • MibADC1: 32 Channels Plus Control for up to 1024 Off-Chip Channels
    • MibADC2: 25 Channels
    • 16 Shared Channels
    • 64 Result Buffers Each With Parity Protection
  • Enhanced Timing Peripherals
    • 7 Enhanced Pulse Width Modulator (ePWM) Modules
    • 6 Enhanced Capture (eCAP) Modules
    • 2 Enhanced Quadrature Encoder Pulse (eQEP) Modules
  • Three On-Die Temperature Sensors
  • Up to 145 Pins Available for General-Purpose I/O (GPIO)
  • 16 Dedicated GPIO Pins With External Interrupt Capability
  • Packages
    • 337-Ball Grid Array (GWT) [Green]
  • Supports Defense, Aerospace, and Medical Applications:
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Extended (–55°C to 125°C) Temperature Range
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability
  • High-Performance Automotive-Grade Microcontroller for Safety-Critical Applications
    • Dual-Core Lockstep CPUs With ECC-Protected Caches
    • ECC on Flash and RAM Interfaces
    • Built-In Self-Test (BIST) for CPU, High-End Timers, and On-Chip RAMs
    • Error Signaling Module (ESM) With Error Pin
    • Voltage and Clock Monitoring
  • ARM? Cortex? - R5F 32-Bit RISC CPU
    • 1.66 DMIPS/MHz With 8-Stage Pipeline
    • FPU With Single- and Double-Precision
    • 16-Region Memory Protection Unit (MPU)
    • 32KB of Instruction and 32KB of Data Caches With ECC
    • Open Architecture With Third-Party Support
  • Operating Conditions
    • Up to 300-MHz CPU Clock
    • Core Supply Voltage (VCC): 1.14 to 1.32 V
    • I/O Supply Voltage (VCCIO): 3.0 to 3.6 V
  • Integrated Memory
    • 4MB of Program Flash With ECC
    • 512KB of RAM With ECC
    • 128KB of Data Flash for Emulated EEPROM With ECC
  • 16-Bit External Memory Interface (EMIF)
  • Hercules? Common Platform Architecture
    • Consistent Memory Map Across Family
    • Real-Time Interrupt (RTI) Timer (OS Timer)
    • Two 128-Channel Vectored Interrupt Modules (VIMs) With ECC Protection on Vector Table
      • VIM1 and VIM2 in Safety Lockstep Mode
    • Two 2-Channel Cyclic Redundancy Checker (CRC) Modules
  • Direct Memory Access (DMA) Controller
    • 32 Channels and 48 Peripheral Requests
    • ECC Protection for Control Packet RAM
    • DMA Accesses Protected by Dedicated MPU
  • Frequency-Modulated Phase-Locked Loop (FMPLL) With Built-In Slip Detector
  • Separate Nonmodulating PLL
  • IEEE 1149.1 JTAG, Boundary Scan, and ARM CoreSight? Components
  • Advanced JTAG Security Module (AJSM) 
  • Trace and Calibration Capabilities
    • ETM?, RTP, DMM, POM
  • Multiple Communication Interfaces
    • 10/100 Mbps Ethernet MAC (EMAC)
      • IEEE 802.3 Compliant (3.3-V I/O Only)
      • Supports MII, RMII, and MDIO
    • FlexRay Controller With 2 Channels
      • 8KB of Message RAM With ECC Protection
      • Dedicated FlexRay Transfer Unit (FTU)
    • Four CAN Controller (DCAN) Modules
      • 64 Mailboxes, Each With ECC Protection
      • Compliant to CAN Protocol Version 2.0B
    • Two Inter-Integrated Circuit (I2C) Modules
    • Five Multibuffered Serial Peripheral Interface (MibSPI) Modules
      • MibSPI1: 256 Words With ECC Protection
      • Other MibSPIs: 128 Words With ECC Protection
    • Four UART (SCI) Interfaces, Two With Local Interconnect Network (LIN 2.1) Interface Support
  • Two Next Generation High-End Timer (N2HET) Modules
    • 32 Programmable Channels Each
    • 256-Word Instruction RAM With Parity
    • Hardware Angle Generator for Each N2HET
    • Dedicated High-End Timer Transfer Unit (HTU) for Each N2HET
  • Two 12-Bit Multibuffered Analog-to-Digital Converter (MibADC) Modules
    • MibADC1: 32 Channels Plus Control for up to 1024 Off-Chip Channels
    • MibADC2: 25 Channels
    • 16 Shared Channels
    • 64 Result Buffers Each With Parity Protection
  • Enhanced Timing Peripherals
    • 7 Enhanced Pulse Width Modulator (ePWM) Modules
    • 6 Enhanced Capture (eCAP) Modules
    • 2 Enhanced Quadrature Encoder Pulse (eQEP) Modules
  • Three On-Die Temperature Sensors
  • Up to 145 Pins Available for General-Purpose I/O (GPIO)
  • 16 Dedicated GPIO Pins With External Interrupt Capability
  • Packages
    • 337-Ball Grid Array (GWT) [Green]
  • Supports Defense, Aerospace, and Medical Applications:
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Extended (–55°C to 125°C) Temperature Range
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability

The TMS570LC4357-EP device is part of the Hercules TMS570 series of high-performance automotive-grade ARM® Cortex®-R-based MCUs. Comprehensive documentation, tools, and software are available to assist in the development of ISO 26262 and IEC 61508 functional safety applications. Start evaluating today with the Hercules TMS570LC43x LaunchPad Development Kit. The TMS570LC4357-EP device has on-chip diagnostic features including: dual CPUs in lockstep, Built-In Self-Test (BIST) logic for CPU, the N2HET coprocessors, and for on-chip SRAMs; ECC protection on the L1 caches, L2 flash, and SRAM memories. The device also supports ECC or parity protection on peripheral memories and loopback capability on peripheral I/Os.

The TMS570LC4357-EP device integrates two ARM Cortex-R5F floating-point CPUs, operating in lockstep, which offer an efficient 1.66 DMIPS/MHz, and can run up to 300 MHz providing up to 498 DMIPS. The device supports the big-endian [BE32] format.

The TMS570LC4357-EP device has 4MB of integrated flash and 512KB of data RAM with single-bit error correction and double-bit error detection. The flash memory on this device is a nonvolatile, electrically erasable and programmable memory, implemented with a 64-bit-wide data bus interface. The flash operates on a 3.3-V supply input (the same level as the I/O supply) for all read, program, and erase operations. The SRAM supports read and write accesses in byte, halfword, and word modes.

The TMS570LC4357-EP device features peripherals for real-time control-based applications, including two Next Generation High-End Timer (N2HET) timing coprocessors with up to 64 total I/O terminals.

The N2HET is an advanced intelligent timer that provides sophisticated timing functions for real-time applications. The timer is software-controlled, with a specialized timer micromachine and an attached I/O port. The N2HET can be used for pulse-width-modulated outputs, capture or compare inputs, or GPIO. The N2HET is especially well suited for applications requiring multiple sensor information or drive actuators with complex and accurate time pulses. The High-End Timer Transfer Unit (HTU) can perform DMA-type transactions to transfer N2HET data to or from main memory. A Memory Protection Unit (MPU) is built into the HTU.

The Enhanced Pulse Width Modulator (ePWM) module can generate complex pulse width waveforms with minimal CPU overhead or intervention. The ePWM is easy to use and supports both high-side and low-side PWM and deadband generation. With integrated trip zone protection and synchronization with the on-chip MibADC, the ePWM is ideal for digital motor control applications.

The Enhanced Capture (eCAP) module is essential in systems where the accurately timed capture of external events is important. The eCAP can also be used to monitor the ePWM outputs or for simple PWM generation when not needed for capture applications.

The Enhanced Quadrature Encoder Pulse (eQEP) module directly interfaces with a linear or rotary incremental encoder to get position, direction, and speed information from a rotating machine as used in high-performance motion and position-control systems.

The device has two 12-bit-resolution MibADCs with 41 total channels and 64 words of parity-protected buffer RAM. The MibADC channels can be converted individually or by group for special conversion sequences. Sixteen channels are shared between the two MibADCs. Each MibADC supports three separate groupings. Each sequence can be converted once when triggered or configured for continuous conversion mode. The MibADC has a 10-bit mode for use when compatibility with older devices or faster conversion time is desired. One of the channels in MibADC1 and two of the channels in MibADC2 can be used to convert temperature measurements from the three on-chip temperature sensors.

The device has multiple communication interfaces: Five MibSPIs; four UART (SCI) interfaces, two with LIN support; four CANs; two I2C modules; one Ethernet Controller; and one FlexRay controller. The SPI provides a convenient method of serial interaction for high-speed communications between similar shift-register type devices. The LIN supports the Local Interconnect standard (LIN 2.1) and can be used as a UART in full-duplex mode using the standard Non-Return-to-Zero (NRZ) format. The DCAN supports the CAN 2.0B protocol standard and uses a serial, multimaster communication protocol that efficiently supports distributed real-time control with robust communication rates of up to 1 Mbps. The DCAN is ideal for applications operating in noisy and harsh environments (for example, automotive and industrial fields) that require reliable serial communication or multiplexed wiring. The FlexRay controller uses a dual-channel serial, fixed time base multimaster communication protocol with communication rates of 10 Mbps per channel. A FlexRay Transfer Unit (FTU) enables autonomous transfers of FlexRay data to and from main CPU memory. HTU transfers are protected by a dedicated, built-in MPU. The Ethernet module supports MII, RMII, and Management Data I/O (MDIO) interfaces. The I2C module is a multimaster communication module providing an interface between the microcontroller and an I2C-compatible device through the I2C serial bus. The I2C module supports speeds of 100 and 400 kbps.

The Frequency-Modulated Phase-Locked Loop (FMPLL) clock module multiplies the external frequency reference to a higher frequency for internal use. The Global Clock Module (GCM) manages the mapping between the available clock sources and the internal device clock domains.

The device also has two External Clock Prescaler (ECP) modules. When enabled, the ECPs output a continuous external clock on the ECLK1 and ECLK2 balls. The ECLK frequency is a user-programmable ratio of the peripheral interface clock (VCLK) frequency. This low-frequency output can be monitored externally as an indicator of the device operating frequency.

The Direct Memory Access (DMA) controller has 32 channels, 48 peripheral requests, and ECC protection on its memory. An MPU is built into the DMA to protect memory against erroneous transfers.

The Error Signaling Module (ESM) monitors on-chip device errors and determines whether an interrupt or external Error pin/ball (nERROR) is triggered when a fault is detected. The nERROR signal can be monitored externally as an indicator of a fault condition in the microcontroller.

The External Memory Interface (EMIF) provides a memory extension to asynchronous and synchronous memories or other slave devices.

A Parameter Overlay Module (POM) is included to enhance the debugging capabilities of application code. The POM can reroute flash accesses to internal RAM or to the EMIF, thus avoiding the reprogramming steps necessary for parameter updates in flash. This capability is particularly helpful during real-time system calibration cycles.

Several interfaces are implemented to enhance the debugging capabilities of application code. In addition to the built-in ARM Cortex-R5F CoreSight debug features, the Embedded Cross Trigger (ECT) supports the interaction and synchronization of multiple triggering events within the SoC. An External Trace Macrocell (ETM) provides instruction and data trace of program execution. For instrumentation purposes, a RAM Trace Port (RTP) module is implemented to support high-speed tracing of RAM and peripheral accesses by the CPU or any other master. A Data Modification Module (DMM) gives the ability to write external data into the device memory. Both the RTP and DMM have no or minimal impact on the program execution time of the application code.

With integrated safety features and a wide choice of communication and control peripherals, the TMS570LC4357-EP device is an ideal solution for high-performance real-time control applications with safety-critical requirements.

The TMS570LC4357-EP device is part of the Hercules TMS570 series of high-performance automotive-grade ARM® Cortex®-R-based MCUs. Comprehensive documentation, tools, and software are available to assist in the development of ISO 26262 and IEC 61508 functional safety applications. Start evaluating today with the Hercules TMS570LC43x LaunchPad Development Kit. The TMS570LC4357-EP device has on-chip diagnostic features including: dual CPUs in lockstep, Built-In Self-Test (BIST) logic for CPU, the N2HET coprocessors, and for on-chip SRAMs; ECC protection on the L1 caches, L2 flash, and SRAM memories. The device also supports ECC or parity protection on peripheral memories and loopback capability on peripheral I/Os.

The TMS570LC4357-EP device integrates two ARM Cortex-R5F floating-point CPUs, operating in lockstep, which offer an efficient 1.66 DMIPS/MHz, and can run up to 300 MHz providing up to 498 DMIPS. The device supports the big-endian [BE32] format.

The TMS570LC4357-EP device has 4MB of integrated flash and 512KB of data RAM with single-bit error correction and double-bit error detection. The flash memory on this device is a nonvolatile, electrically erasable and programmable memory, implemented with a 64-bit-wide data bus interface. The flash operates on a 3.3-V supply input (the same level as the I/O supply) for all read, program, and erase operations. The SRAM supports read and write accesses in byte, halfword, and word modes.

The TMS570LC4357-EP device features peripherals for real-time control-based applications, including two Next Generation High-End Timer (N2HET) timing coprocessors with up to 64 total I/O terminals.

The N2HET is an advanced intelligent timer that provides sophisticated timing functions for real-time applications. The timer is software-controlled, with a specialized timer micromachine and an attached I/O port. The N2HET can be used for pulse-width-modulated outputs, capture or compare inputs, or GPIO. The N2HET is especially well suited for applications requiring multiple sensor information or drive actuators with complex and accurate time pulses. The High-End Timer Transfer Unit (HTU) can perform DMA-type transactions to transfer N2HET data to or from main memory. A Memory Protection Unit (MPU) is built into the HTU.

The Enhanced Pulse Width Modulator (ePWM) module can generate complex pulse width waveforms with minimal CPU overhead or intervention. The ePWM is easy to use and supports both high-side and low-side PWM and deadband generation. With integrated trip zone protection and synchronization with the on-chip MibADC, the ePWM is ideal for digital motor control applications.

The Enhanced Capture (eCAP) module is essential in systems where the accurately timed capture of external events is important. The eCAP can also be used to monitor the ePWM outputs or for simple PWM generation when not needed for capture applications.

The Enhanced Quadrature Encoder Pulse (eQEP) module directly interfaces with a linear or rotary incremental encoder to get position, direction, and speed information from a rotating machine as used in high-performance motion and position-control systems.

The device has two 12-bit-resolution MibADCs with 41 total channels and 64 words of parity-protected buffer RAM. The MibADC channels can be converted individually or by group for special conversion sequences. Sixteen channels are shared between the two MibADCs. Each MibADC supports three separate groupings. Each sequence can be converted once when triggered or configured for continuous conversion mode. The MibADC has a 10-bit mode for use when compatibility with older devices or faster conversion time is desired. One of the channels in MibADC1 and two of the channels in MibADC2 can be used to convert temperature measurements from the three on-chip temperature sensors.

The device has multiple communication interfaces: Five MibSPIs; four UART (SCI) interfaces, two with LIN support; four CANs; two I2C modules; one Ethernet Controller; and one FlexRay controller. The SPI provides a convenient method of serial interaction for high-speed communications between similar shift-register type devices. The LIN supports the Local Interconnect standard (LIN 2.1) and can be used as a UART in full-duplex mode using the standard Non-Return-to-Zero (NRZ) format. The DCAN supports the CAN 2.0B protocol standard and uses a serial, multimaster communication protocol that efficiently supports distributed real-time control with robust communication rates of up to 1 Mbps. The DCAN is ideal for applications operating in noisy and harsh environments (for example, automotive and industrial fields) that require reliable serial communication or multiplexed wiring. The FlexRay controller uses a dual-channel serial, fixed time base multimaster communication protocol with communication rates of 10 Mbps per channel. A FlexRay Transfer Unit (FTU) enables autonomous transfers of FlexRay data to and from main CPU memory. HTU transfers are protected by a dedicated, built-in MPU. The Ethernet module supports MII, RMII, and Management Data I/O (MDIO) interfaces. The I2C module is a multimaster communication module providing an interface between the microcontroller and an I2C-compatible device through the I2C serial bus. The I2C module supports speeds of 100 and 400 kbps.

The Frequency-Modulated Phase-Locked Loop (FMPLL) clock module multiplies the external frequency reference to a higher frequency for internal use. The Global Clock Module (GCM) manages the mapping between the available clock sources and the internal device clock domains.

The device also has two External Clock Prescaler (ECP) modules. When enabled, the ECPs output a continuous external clock on the ECLK1 and ECLK2 balls. The ECLK frequency is a user-programmable ratio of the peripheral interface clock (VCLK) frequency. This low-frequency output can be monitored externally as an indicator of the device operating frequency.

The Direct Memory Access (DMA) controller has 32 channels, 48 peripheral requests, and ECC protection on its memory. An MPU is built into the DMA to protect memory against erroneous transfers.

The Error Signaling Module (ESM) monitors on-chip device errors and determines whether an interrupt or external Error pin/ball (nERROR) is triggered when a fault is detected. The nERROR signal can be monitored externally as an indicator of a fault condition in the microcontroller.

The External Memory Interface (EMIF) provides a memory extension to asynchronous and synchronous memories or other slave devices.

A Parameter Overlay Module (POM) is included to enhance the debugging capabilities of application code. The POM can reroute flash accesses to internal RAM or to the EMIF, thus avoiding the reprogramming steps necessary for parameter updates in flash. This capability is particularly helpful during real-time system calibration cycles.

Several interfaces are implemented to enhance the debugging capabilities of application code. In addition to the built-in ARM Cortex-R5F CoreSight debug features, the Embedded Cross Trigger (ECT) supports the interaction and synchronization of multiple triggering events within the SoC. An External Trace Macrocell (ETM) provides instruction and data trace of program execution. For instrumentation purposes, a RAM Trace Port (RTP) module is implemented to support high-speed tracing of RAM and peripheral accesses by the CPU or any other master. A Data Modification Module (DMM) gives the ability to write external data into the device memory. Both the RTP and DMM have no or minimal impact on the program execution time of the application code.

With integrated safety features and a wide choice of communication and control peripherals, the TMS570LC4357-EP device is an ideal solution for high-performance real-time control applications with safety-critical requirements.

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* 數(shù)據(jù)表 TMS570LC4357-EP Hercules? Microcontroller Based on the ARM? Cortex?-R Core 數(shù)據(jù)表 (Rev. A) PDF | HTML 2019年 9月 18日
* 勘誤表 TMS570LC4357 Microcontroller Silicon Errata (Silicon Revision A) (Rev. D) 2016年 5月 31日
* VID TMS570LC4357-EP VID V62/186060-01XF 2020年 9月 22日
* 用戶指南 TMS570LC43x 16/32 RISC Flash Microcontroller Technical Reference Manual (Rev. A) 2018年 3月 1日
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應(yīng)用手冊 HALCoGen CSP Without LDRA Release_Notes 2019年 8月 19日
用戶指南 HALCoGen-CSP Without LDRA Installation Guide PDF | HTML 2019年 8月 19日
用戶指南 HALCoGen-CSP Without LDRA User's Guide PDF | HTML 2019年 8月 19日
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用戶指南 Hercules? Diag Lib Test Automation Unit Without LDRA User's Guide PDF | HTML 2019年 8月 19日
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應(yīng)用手冊 High Speed Serial Bus Using the MibSPIP Module on Hercules-Based MCUs 2016年 4月 22日
應(yīng)用手冊 TMS570LC4357 and RM57L843 On-Chip Temperature Sensor Measurements 2016年 1月 18日
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應(yīng)用手冊 Triggering ADC Using Internal Timer Events on Hercules MCUs 2015年 10月 19日
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應(yīng)用手冊 Sine Wave Generation Using PWM With Hercules N2HET and HTU 2015年 5月 12日
應(yīng)用手冊 Triangle/Trapezoid Wave Generation Using PWM With Hercules N2HET 2015年 5月 1日
應(yīng)用手冊 Nested Interrupts on Hercules ARM Cortex-R4/5-Based Microncontrollers 2015年 4月 23日
白皮書 Latch-Up White Paper PDF | HTML 2015年 4月 22日
應(yīng)用手冊 Interrupt and Exception Handling on Hercules ARM Cortex-R4/5-Based MCUs 2015年 4月 20日
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證書 TüV NORD Certificate for Functional Safety Software Development Process 2015年 2月 3日
功能安全信息 Calculating Equivalent Power-on-Hours for Hercules Safety MCUs 2015年 1月 26日
功能安全信息 TUV SUD ISO-13849 Safety Architecture Concept Study 2014年 7月 2日
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功能安全信息 IEC 60730 and UL 1998 Safety Standard Compliance Made Easier with TI Hercules 2013年 10月 3日
白皮書 Model-Based Tool Qualification of the TI C/C++ ARM? Compiler 2013年 6月 6日
應(yīng)用手冊 Hercules Family Frequency Slewing to Reduce Voltage and Current Transients 2012年 7月 5日
應(yīng)用手冊 Basic PBIST Configuration and Influence on Current Consumption (Rev. C) 2012年 4月 12日
應(yīng)用手冊 Verification of Data Integrity Using CRC 2012年 2月 17日
應(yīng)用手冊 FlexRay Transfer Unit (FTU) Setup 2012年 1月 26日
用戶指南 HET Integrated Development Environment User's Guide (Rev. A) 2011年 11月 17日
功能安全信息 Important ARM Ltd Application Notes for TI Hercules ARM Safety MCUs 2011年 11月 17日
功能安全信息 Execution Time Measurement for Hercules ARM Safety MCUs (Rev. A) 2011年 11月 4日
應(yīng)用手冊 Use of All 1'’s and All 0's Valid in Flash EEPROM Emulation 2011年 9月 27日
應(yīng)用手冊 3.3 V I/O Considerations for Hercules Safety MCUs (Rev. A) 2011年 9月 6日
功能安全信息 Configuring the Hercules ARM Safety MCU SCI/LIN Module for UART Communication (Rev. A) 2011年 9月 6日
功能安全信息 Hercules? Microcontrollers: Real-time MCUs for safety-critical products 2011年 9月 2日
應(yīng)用手冊 ECC Handling in TMSx70-Based Microcontrollers 2011年 2月 23日
用戶指南 TI ICEPick Module Type C Reference Guide Public Version 2011年 2月 17日
應(yīng)用手冊 NHET Getting Started (Rev. B) 2010年 8月 30日
功能安全信息 Generating Operating System Tick Using RTI on a Hercules ARM Safety MCU 2010年 7月 13日
功能安全信息 Usage of MPU Subregions on TI Hercules ARM Safety MCUs 2010年 3月 10日
用戶指南 TI Assembly Language Tools Enhanced High-End Timer (NHET) Assembler User's Guide 2010年 3月 4日
白皮書 Discriminating between Soft Errors and Hard Errors in RAM White Paper 2008年 6月 4日

設(shè)計(jì)和開發(fā)

如需其他信息或資源,請點(diǎn)擊以下任一標(biāo)題進(jìn)入詳情頁面查看(如有)。

評估板

ALGO-3P-UISP1-TI — 適用于德州儀器 (TI) 器件的 Algocraft μISP1 編程器

μISP 既可以連接到主機(jī) PC(內(nèi)置 RS-232、USB 和 LAN 連接),也可以在獨(dú)立模式下運(yùn)行。

只需按下 START 按鈕或通過某些 TTL 控制線,即可在獨(dú)立模式下執(zhí)行編程周期。

其緊湊的尺寸和多功能性便于集成到生產(chǎn)環(huán)境、手動和自動流程中。

來源:Algocraft
調(diào)試探針

TMDSEMU200-U — XDS200 USB 調(diào)試探針

XDS200 是用于調(diào)試 TI 嵌入式器件的調(diào)試探針(仿真器)。? 與低成本的 XDS110 和高性能的 XDS560v2 相比,XDS200 在低成本和高性能之間實(shí)現(xiàn)了平衡。? 它在單個倉體中支持廣泛的標(biāo)準(zhǔn)(IEEE1149.1、IEEE1149.7、SWD)。所有 XDS 調(diào)試探針在所有具有嵌入式跟蹤緩沖器 (ETB) 的 Arm? 和 DSP 處理器中均支持內(nèi)核和系統(tǒng)跟蹤。??對于引腳上的內(nèi)核跟蹤,則需要使用?XDS560v2 PRO TRACE。

XDS200 通過 TI 20 引腳連接器(帶有適用于 TI 14 引腳、Arm Cortex? 10 引腳和 Arm 20 (...)

TI.com 上無現(xiàn)貨
調(diào)試探針

TMDSEMU560V2STM-U — XDS560? 軟件 v2 系統(tǒng)跟蹤 USB 調(diào)試探針

XDS560v2 是 XDS560™ 系列調(diào)試探針中性能非常出色的產(chǎn)品,同時支持傳統(tǒng) JTAG 標(biāo)準(zhǔn) (IEEE1149.1) 和 cJTAG (IEEE1149.7)。請注意,它不支持串行線調(diào)試 (SWD)。

所有 XDS 調(diào)試探針在所有具有嵌入式跟蹤緩沖器 (ETB) 的 ARM 和 DSP 處理器中均支持內(nèi)核和系統(tǒng)跟蹤。對于引腳上的跟蹤,需要 XDS560v2 PRO TRACE。

XDS560v2 通過 MIPI HSPT 60 引腳連接器(帶有多個用于 TI 14 引腳、TI 20 引腳和 ARM 20 引腳的適配器)連接到目標(biāo)板,并通過 USB2.0 高速 (480Mbps) (...)

TI.com 上無現(xiàn)貨
調(diào)試探針

TMDSEMU560V2STM-UE — Spectrum Digital XDS560v2 系統(tǒng)跟蹤 USB 和以太網(wǎng)

XDS560v2 System Trace 是 XDS560v2 系列高性能 TI 處理器調(diào)試探針(仿真器)的第一種型號。XDS560v2 是 XDS 系列調(diào)試探針中性能最高的一款,同時支持傳統(tǒng) JTAG 標(biāo)準(zhǔn) (IEEE1149.1) 和 cJTAG (IEEE1149.7)。

XDS560v2 System Trace 在其巨大的外部存儲器緩沖區(qū)中加入了系統(tǒng)引腳跟蹤。這種外部存儲器緩沖區(qū)適用于指定的 TI 器件,通過捕獲相關(guān)器件級信息,獲得準(zhǔn)確的總線性能活動和吞吐量,并對內(nèi)核和外設(shè)進(jìn)行電源管理。此外,對于帶有嵌入式緩沖跟蹤器 (ETB) 的所有 ARM 和 DSP 處理器,所有 XDS (...)

TI.com 上無現(xiàn)貨
調(diào)試探針

LB-3P-TRACE32-ARM — 適用于基于 Arm? 的微控制器和處理器的 Lauterbach TRACE32? 調(diào)試和跟蹤系統(tǒng)

Lauterbach TRACE32? 工具是一套先進(jìn)的硬件和軟件組件,開發(fā)人員可通過它分析、優(yōu)化和認(rèn)證各種基于 Arm? 的微控制器和處理器。這套全球知名的嵌入式系統(tǒng)和 SoC 調(diào)試和跟蹤解決方案是所有開發(fā)階段(從器件前開發(fā)一直到產(chǎn)品認(rèn)證和現(xiàn)場故障排查)的理想解決方案。Lauterbach 工具直觀的模塊化設(shè)計(jì)可為工程師提供當(dāng)今最高的可用性能,并提供可隨需求變化而調(diào)整和擴(kuò)展的系統(tǒng)。借助 TRACE32? 調(diào)試器,開發(fā)人員還可以通過單個調(diào)試接口同時調(diào)試和控制 SoC 中的任何 C28x/C29x C6x/C7x DSP 內(nèi)核以及所有其他 Arm 內(nèi)核,這是業(yè)界的一項(xiàng)獨(dú)特功能。

來源:Lauterbach GmbH
調(diào)試探針

TSK-3P-BLUEBOX — TASKING BlueBox hardware debugger

TASKING’s Debug, Trace, and Test tools offer comprehensive solutions for efficient debugging, tracing, and testing of TI's embedded systems. The scalable TASKING BlueBox debuggers allow users to easily flash, debug, and test across TI's portfolio. Development on TI hardware is made even easier with (...)

開發(fā)套件

LAUNCHXL2-570LC43 — Hercules TMS570LC43x LaunchPad 開發(fā)套件

Hercules? TMS570LC43x LaunchPad? 開發(fā)套件是基于超高性能 Hercules MCU TMS570LC4357(基于 ARM? Cortex?-R5F、緩存鎖步、300MHz TMS570 系列汽車級 MCU)的低成本評估平臺,旨在幫助開發(fā) ISO 26262IEC 61508 功能安全應(yīng)用。

該 LaunchPad 具有 IEEE 1588 精確時間以太網(wǎng) PHY DP83630 之類的連接選項(xiàng),并且除了標(biāo)準(zhǔn) BoosterPack 接頭外,還可以使用用于 MCU 并行接口(EMIF、RTP 和 DMM)的高密度連接器進(jìn)一步擴(kuò)展到 FPGA 或外部 (...)

用戶指南: PDF
TI.com 上無現(xiàn)貨
開發(fā)套件

TMDX570LC43HDK — TMDX570LC43HDK Hercules 開發(fā)套件

The TMS570LC43x Hercules Development Kit is ideal for getting started on development with the Hercules TMS570LC4357 high-performance safety microcontrollers. The kit is comprised of a development board, a DC power supply, a mini-B USB cable, an Ethernet cable and a software installation DVD that (...)

用戶指南: PDF
TI.com 上無現(xiàn)貨
硬件編程工具

ALGO-3P-WRITENOW — Algocraft WriteNow! 編程器

WriteNow! 系列系統(tǒng)內(nèi)編程器是編程行業(yè)的突破性產(chǎn)品。該系列編程器支持來自不同制造商的眾多器件(微控制器、存儲器、CPLD 和其他可編程器件),并具有緊湊的尺寸,方便與 ATE/固定裝置集成。它們可獨(dú)立運(yùn)行,也可連接到主機(jī) PC(內(nèi)置 RS-232、LAN 和 USB 連接),并附帶易于使用的軟件實(shí)用程序。

來源:Algocraft
IDE、配置、編譯器或調(diào)試器

CCSTUDIO Code Composer Studio 集成式開發(fā)環(huán)境 (IDE)

Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It is comprised of a rich suite of tools used to build, debug, analyze and optimize embedded applications. Code Composer Studio is available across Windows?, Linux? and macOS? platforms.

(...)

支持的產(chǎn)品和硬件

支持的產(chǎn)品和硬件

此設(shè)計(jì)資源支持這些類別中的大部分產(chǎn)品。

查看產(chǎn)品詳情頁,驗(yàn)證是否能提供支持。

啟動 下載選項(xiàng)
支持軟件

VCTR-3P-MICROSAR — 適用于微控制器和高性能計(jì)算機(jī) (HPC) 的 Vector MICROSAR AUTOSAR 軟件

MICROSAR 和 DaVinci 產(chǎn)品系列憑借適用于微控制器和 HPC 的先進(jìn)嵌入式軟件和強(qiáng)大的開發(fā)工具簡化了 ECU 開發(fā)。利用先進(jìn)的基礎(chǔ)設(shè)施軟件,即可為 ECU 奠定良好基礎(chǔ),并使用相關(guān)工具簡化所有配套開發(fā)任務(wù)。MICROSAR 嵌入式軟件是按照 AUTOSAR classic 和 adaptive 等相關(guān)標(biāo)準(zhǔn)開發(fā)的。根據(jù) ISO 26262 高達(dá) ASIL D 的安全標(biāo)準(zhǔn),該軟件還適用于安全相關(guān)應(yīng)用。此外,智能網(wǎng)絡(luò)安全功能可保護(hù)控制單元免受未經(jīng)授權(quán)的訪問和操縱。Vector 涵蓋汽車和其他工業(yè)應(yīng)用的所有用例。對于具有高性能計(jì)算機(jī)的軟件定義車輛 (...)
仿真模型

TMS570LC4357 ZWT Ibis Model

SPNM063.ZIP (617 KB) - IBIS Model
仿真模型

TMS570LC43xx ZWT BSDL Model

SPNM050.ZIP (9 KB) - BSDL Model
封裝 引腳 CAD 符號、封裝和 3D 模型
NFBGA (GWT) 337 Ultra Librarian

訂購和質(zhì)量

包含信息:
  • RoHS
  • REACH
  • 器件標(biāo)識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測
包含信息:
  • 制造廠地點(diǎn)
  • 封裝廠地點(diǎn)

推薦產(chǎn)品可能包含與 TI 此產(chǎn)品相關(guān)的參數(shù)、評估模塊或參考設(shè)計(jì)。

支持和培訓(xùn)

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