ZHCSJK5D January 2018 – June 2022 TCAN4550-Q1
PRODUCTION DATA
If VIO drops below UVIO under the voltage detection threshold, several functions are disabled. The transceiver switches off until VIO has recovered. The input clock or crystal circuits are disabled and the IO between the TCAN4550-Q1 and microprocessor is not active. When UVIO triggers, the tUV timer starts. If the timer times out and the UVIO is still there, the device enters sleep mode, see Figure 8-5. Once in sleep mode, a wake event is required to place the TCAN4550-Q1 into standby mode and enables the INH pin. As registers are cleared in sleep mode the UVIO interrupt flag is lost. If the UVIO event is still in place, the cycle repeats. If during a thermal shut down event a UVIO event happens, the device automatically enters sleep mode.
The device is designed to be an "ideal passive" or “no load” to the CAN bus if the device is unpowered. The bus terminals (CANH, CANL) have extremely low leakage currents when the device is unpowered so it does not load the bus. This is critical if some nodes of the network are unpowered while the rest of the of network remains operational. Logic terminals also have extremely low leakage currents when the device is unpowered, so they do not load other circuits which may remain powered.
The UVLO circuit monitors both rising and falling edge of a power rail when ramping and declining.
| VSUP | VIO | VCCOUT | DEVICE STATE | BUS | RXD_INT |
|---|---|---|---|---|---|
| > UVSUP | > UVVIO | > UVCCOUT | Normal | Per TXD_INT | Mirrors Bus |
| > UVSUP | > UVVIO | < UVCCOUT | Protected | High Impedance | High (Recessive) |
| < UVSUP | > UVVIO | NA | Protected | High Impedance | High (Recessive) |
| > UVSUP | < UVVIO | > UVCCOUT | Protected | Recessive | High Impedance |
| < UVSUP | < UVVIO | NA | Protected | High Impedance | High Impedance |
Once an under-voltage condition and interrupt flags are cleared and the VSUP supply has returned to valid level, the device typically needs tMODE_CHANGE to transition to normal operation. The host processor should not attempt to send or receive messages until this transition time has expired. If EN is low and VSUP has an under-voltage event, the device goes into a protected mode which disables the wake-up receiver and places the RXD_INT output into a high impedance state.