ZHCSJK5D January 2018 – June 2022
PRODUCTION DATA
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RSVD | RF0L | F0F | |||||
| R | R | R | |||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RSVD | F0PI[5:0] | ||||||
| R | R | ||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RSVD | F0GI[5:0] | ||||||
| R | R | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RSVD | F0FL[6:0] | ||||||
| R | R | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:26 | RSVD | R | 0x0 | Reserved |
| 25 | RF0L | R | 0 | Rx FIFO 0 Message Lost This bit is a copy of interrupt flag IR.RF0L. When IR.RF0L is reset, this bit is also reset. 0 - No Rx FIFO 0 message lost 1 - Rx FIFO 0 message lost; also set after write attempt to Rx FIFO 0 of size zero Note: Overwriting the oldest message when RXF0C.F0OM = ‘1’ will not set this flag |
| 24 | F0F | R | 0 | Rx FIFO 0 Full 0 - Rx FIFO 0 not full 1 - Rx FIFO 0 full |
| 23:22 | RSVD | R | 0x0 | Reserved |
| 21:16 | F0PI[5:0] | R | 0x0 | Rx FIFO 0 Put Index Rx FIFO 0 write index pointer, range 0 to 63 |
| 15:14 | RSVD | R | 0x0 | Reserved |
| 13:8 | F0GI[5:0] | R | 0x0 | Rx FIFO 0 Get Index Rx FIFO 0 read index pointer, range 0 to 63 |
| 7 | RSVD | R | 0 | Reserved |
| 6:0 | F0FL[6:0] | R | 0x0 | Rx FIFO 0 Fill Level Number of elements stored in Rx FIFO 0, range 0 to 64. |