ZHCSJK5D January 2018 – June 2022 TCAN4550-Q1
PRODUCTION DATA
| PIN | TYPE(1) | DESCRIPTION | |
|---|---|---|---|
| NO. | NAME | ||
| 1 | OSC1 | I/O | External crystal oscillator output or single-ended clock input |
| 2 | nWKRQ | DO | Wake request (active low) |
| 3 | GPIO1 | DI/O | Configurable input/output function pin through SPI |
| 4 | SCLK | DI | SPI clock input |
| 5 | SDI | DI | SPI target data input from controller output |
| 6 | SDO | DO | SPI target data output to controller input |
| 7 | nCS | DI | SPI chip select |
| 8 | nINT | DO | Interrupt pin to MCU (active low) |
| 9 | GPO2 | DO | Configurable output function pin through SPI |
| 10 | CANL | HV Bus I/O | Low level CAN bus line |
| 11 | CANH | HV Bus I/O | High level CAN bus line |
| 12 | WAKE | HVI | Wake input, high voltage input |
| 13 | GND | GND | Ground connection |
| 14 | VSUP | HV Supply In | Supply from battery |
| 15 | INH | HVO | Inhibit to control system voltage regulators and supplies (open drain) |
| 16 | VCCOUT | Supply Out | 5 V regulated output |
| 17 | VIO | Supply In | Digital I/O voltage supply |
| 18 | FLTR | — | Internal regulator filter, requires external capacitor to ground |
| 19 | RST | DI | Device reset |
| 20 | OSC2 | I | External crystal oscillator input; when using single-ended input clock to OSC1 this pin should be connected to ground. |