ZHCSTD4B September 2019 – October 2023 BQ75614-Q1
PRODUCTION DATA
CRC Test:
The factory registers and customer OTP shadow registers are covered by a CRC check that constantly runs in the background. The CUST_CRC_RSLT_HI and CUST_CRC_RSLT_LO registers hold the current device's computed CRC value. This value is compared against the customer programmed value in the CRC registers, CUST_CRC_HI and CUST_CRC_LO. When updating any customer OTP shadow register covered in the CRC, the host must update a new CRC value to CUST_CRC_HI and CUST_CRC_LO registers. The CRC calculation is performed in the same manner (including the bit stream ordering) and with the same polynomial as described in Section 8.3.6.1.1.2.1.6. The CRC check and comparison for factory and customer spaces is performed periodically and the DEV_STAT[CUST CRC_DONE] and [FACT_CRC_DONE] bits are set after the check is complete. If the bit is already set, it remains set until cleared with a read.
CRC Faults:
When CUST_CRC_HI/LO and CUST_CRC_RSLT_HI/LO do not match, the FAULT_OTP[CUST_CRC] flag is set until the condition is corrected. Continuous monitoring of the factory NVM space occurs in a similar fashion, concurrently with the monitoring of the customer space. When a factory register change is detected, the FAULT_OTP[FACT_CRC] flag is set. When this fault occurs, the host should reset the fault flag to see if the fault persists. If the fault persists, the host must perform a reset of the part. If reset does not correct the issue, the device is corrupted and must not be used.