ZHCSGZ6A October 2017 – February 2025 TPS6508700
PRODUCTION DATA
請參考 PDF 數據表獲取器件具體的封裝圖。
IRQ is shown in Figure 6-16 and described in Table 6-10.
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| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| FAULT | RESERVED | SHUTDN | RESERVED | DIETEMP | |||
| R/W-0h | R-0h | R/W-0h | R-0h | R/W-0h | |||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 7 | FAULT | R/W | 0h | Fault interrupt. Asserted when either condition occurs: SYS < UVLO, power fault of any rail, or die temperature crosses over the critical temperature threshold (TCRIT). The user can read registers 0xB2 through 0xB6 to determine what has caused the interrupt. 0h = Not asserted 1h = Asserted. Host to write 1 to clear. |
| 6-4 | RESERVED | R | 0h | |
| 3 | SHUTDN | R/W | 0h | Asserted when PMIC shuts down. To clear indicator, SHUTDNSRC must be cleared first, see Section 6.9.6 0h = Not asserted. 1h = Asserted. Host to write 1 to clear. |
| 2-1 | RESERVED | R | 0h | |
| 0 | DIETEMP | R/W | 0h | Die temp interrupt. Asserted when PMIC die temperature crosses above the hot temperature threshold (THOT). 0h = Not asserted. 1h = Asserted. Host to write 1 to clear. |