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ZHCSGV6F June 2009 – January 2017 TMS320C6742

PRODUCTION DATA.

封裝選項

請參考 PDF 數據表獲取器件具體的封裝圖。

機械數據 (封裝 | 引腳)

ZWT|361

散熱焊盤機械數據 (封裝 | 引腳)

訂購信息

5.3 Recommended Operating Conditions

	NAME	DESCRIPTION	CONDITION	MIN	NOM	MAX	UNIT
Supply Voltage	CVDD	Core Logic Supply Voltage (variable)	1.2V operating point	1.14	1.2	1.32	V
			1.1V operating point	1.05	1.1	1.16	V
			1.0V operating point	0.95	1.0	1.05	V
	RVDD	Internal RAM Supply Voltage		1.14	1.2	1.32	V
	RTC_CVDD⁽⁴⁾	RTC Core Logic Supply Voltage		0.9	1.2	1.32	V
	PLL0_VDDA	PLL0 Supply Voltage		1.14	1.2	1.32	V
	PLL1_VDDA	PLL1 Supply Voltage		1.14	1.2	1.32	V
	DVDD18⁽⁵⁾	1.8V Supply Voltage		1.71	1.8	1.89	V
	DDR_DVDD18 ⁽⁵⁾	DDR2 PHY Supply Voltage		1.71	1.8	1.89	V
	DDR_VREF	DDR2/mDDR reference voltage		0.49* DDR_DVDD18	0.5* DDR_DVDD18	0.51* DDR_DVDD18	V
	DDR_ZP	DDR2/mDDR impedance control, connected via 50Ω resistor to Vss			Vss		V
	DVDD3318_A	Power Group A Dual-voltage IO Supply Voltage	1.8V operating point	1.71	1.8	1.89	V
	DVDD3318_A	Power Group A Dual-voltage IO Supply Voltage	3.3V operating point	3.15	3.3	3.45	V
	DVDD3318_B	Power Group B Dual-voltage IO Supply Voltage	1.8V operating point	1.71	1.8	1.89	V
	DVDD3318_B	Power Group B Dual-voltage IO Supply Voltage	3.3V operating point	3.15	3.3	3.45	V
	DVDD3318_C	Power Group C Dual-voltage IO Supply Voltage	1.8V operating point	1.71	1.8	1.89	V
	DVDD3318_C	Power Group C Dual-voltage IO Supply Voltage	3.3V operating point	3.15	3.3	3.45	V
Supply Ground	VSS	Core Logic Digital Ground		0	0	0	V
	PLL0_VSSA	PLL0 Ground
	PLL1_VSSA	PLL1 Ground
	OSCVSS⁽¹⁾	Oscillator Ground
	RTC_VSS⁽¹⁾	RTC Oscillator Ground
Voltage Input High	V_IH	High-level input voltage, Dual-voltage I/O, 3.3V⁽²⁾		2			V
		High-level input voltage, Dual-voltage I/O, 1.8V ⁽²⁾		0.65*DVDD			V
		High-level input voltage, RTC_XI		0.8*RTC_CVDD			V
		High-level input voltage, OSCIN		0.8*CVDD			V
Voltage Input Low	V_IL	Low-level input voltage, Dual-voltage I/O, 3.3V⁽²⁾				0.8	V
		Low-level input voltage, Dual-voltage I/O, 1.8V ⁽²⁾				0.35*DVDD	V
		Low-level input voltage, RTC_XI				0.2*RTC_CVDD	V
		Low-level input voltage, OSCIN				0.2*CVDD	V
Transition Time	t_t	Transition time, 10%-90%, All Inputs (unless otherwise specified in the electrical data sections)				0.25P or 10 ⁽³⁾	ns
Operating Frequency	F_{PLL0_SYSCLK1,6}	Commercial temperature grade (default)	CVDD = 1.2V operating point	0		200	MHz
			CVDD = 1.1V operating point	0		150
			CVDD = 1.0V operating point	0		100
		Extended temperature grade (A suffix)	CVDD = 1.2V operating point	0		200	MHz
			CVDD = 1.1V operating point	0		150
			CVDD = 1.0V operating point	0		100

(1) When an external crystal is used oscillator (OSC_VSS, RTC_VSS) ground must be kept separate from other grounds and connected directly to the crystal load capacitor ground. These pins are shorted to VSS on the device itself and should not be connected to VSS on the circuit board. If a crystal is not used and the clock input is driven directly, then the oscillator VSS may be connected to board ground.

(2) These IO specifications apply to the dual-voltage IOs only and do not apply to DDR2/mDDR . DDR2/mDDR IOs are 1.8V IOs and adhere to the JESD79-2A standard.

(3) Whichever is smaller. P = the period of the applied signal. Maintaining transition times as fast as possible is recommended to improve noise immunity on input signals.

(4) The RTC provides an option for isolating the RTC_CVDD from the CVDD to reduce current leakage when the RTC is powered independently. If these power supplies are not isolated (CTRL.SPLITPOWER=0), RTC_CVDD must be equal to or greater than CVDD. If these power supplies are isolated (CTRL.SPLITPOWER=1), RTC_CVDD may be lower than CVDD.

(5) DVDD18 must be powered even if all of the DVDD3318_x x supplies are operated at 3.3V.