ZHCSGP5C August 2017 – February 2022 TIC12400-Q1
PRODUCTION DATA
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Parameter Measurement Information
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 VS Pin
- 8.3.2 VDD Pin
- 8.3.3 Device Initialization
- 8.3.4 Device Trigger
- 8.3.5 Device Reset
- 8.3.6 VS Under-Voltage (UV) Condition
- 8.3.7 VS Over-Voltage (OV) Condition
- 8.3.8 Switch Inputs Settings
- 8.3.9 Interrupt Generation and INT Assertion
- 8.3.10 Temperature Monitor
- 8.3.11 Parity Check and Parity Generation
- 8.3.12 Cyclic Redundancy Check (CRC)
- 8.4 Device Functional Modes
- 8.5 Programming
- 8.6 Register Maps
- 8.7 Programming Guidelines
- 9 Application Information Disclaimer
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
9.3.1 Design Requirements
Figure 9-6 Example 3-state Resistor-Coded SwitchTable 9-4 Example Resistor-Coded Switch Specification
| SPECIFICATION | MIN | MAX | |
|---|---|---|---|
| VBAT | 9 V ≤ VBAT ≤ 16 V | 9 V | 16 V |
| R1 | 680 Ω ± 8% | 625.6 Ω | 734.4 Ω |
| RSW1 | 50 Ω Max when closed | 0 Ω | 50 Ω |
| RSW2 | 50 Ω Max when closed | 0 Ω | 50 Ω |
| RDIRT | 5000 Ω Min | 5000 Ω | ∞ |
| VGND_SHIFT | ±1 V | -1 Ω | +1 Ω |
An example of a 3-state resistor-coded switch is shown in Figure 9-6, with Table 9-4 summarizing its detailed specification. The goal of this design is to utilize the TIC12400-Q1’s integrated ADC to detect and differentiate the 3 switch states:
- State 1: Both SW1 and SW2 open.
- State 2: SW1 open and SW2 close.
- State 3: SW1 close and SW2 open.