ZHCS399E August 2011 – January 2017 OMAP-L132
PRODUCTION DATA.
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
This section describes the steps to use a third party debugger on the ARM926EJ-S within the device. The debug capabilities and features for DSP and ARM are as shown below.
DSP:
| Category | Hardware Feature | Availability |
|---|---|---|
| Basic Debug | Software breakpoint | Unlimited |
| Hardware breakpoint | Up to 10 HWBPs, including: | |
| 4 precise(1) HWBPs inside DSP core and one of them is associated with a counter. | ||
| 2 imprecise(1) HWBPs from AET. | ||
| 4 imprecise(1) HWBPs from AET which are shared for watch point. | ||
| Analysis | Watch point | Up to 4 watch points, which are shared with HWBPs, and can also be used as 2 watch points with data (32 bits) |
| Watch point with Data | Up to 2, Which can also be used as 4 watch points. | |
| Counters/timers | 1x64-bits (cycle only) + 2x32-bits (water mark counters) | |
| External Event Trigger In | 1 | |
| External Event Trigger Out | 1 |
ARM:
| Category | Hardware Feature | Availability |
|---|---|---|
| Basic Debug | Software breakpoint | Unlimited |
| Hardware breakpoint | Up to 14 HWBPs, including: | |
| 2 precise(1) HWBP inside ARM core which are shared with watch points. | ||
| 8 imprecise(1) HWBPs from ETM’s address comparators, which are shared with trace function, and can be used as watch points. | ||
| 4 imprecise(1) HWBPs from ICECrusher. | ||
| Analysis | Watch point | Up to 6 watch points, including: |
| 2 from ARM core which is shared with HWBPs and can be associated with a data. | ||
| 8 from ETM’s address comparators, which are shared with trace function, and HWBPs. | ||
| Watch point with Data | 2 from ARM core which is shared with HWBPs. | |
| 8 watch points from ETM can be associated with a data comparator, and ETM has total 4 data comparators. | ||
| Counters/timers | 3x32-bit (1 cycle ; 2 event) | |
| External Event Trigger In | 1 | |
| External Event Trigger Out | 1 | |
| Internal Cross-Triggering Signals | One between ARM and DSP | |
| Trace Control | Address range for trace | 4 |
| Data qualification for trace | 2 | |
| System events for trace control | 20 | |
| Counters/Timers for trace control | 2x16-bit | |
| State Machines/Sequencers | 1x3-State State Machine | |
| Context/Thread ID Comparator | 1 | |
| Independent trigger control units | 12 | |
| On-chip Trace Capture | Capture depth PC | 4k bytes ETB |
| Capture depth PC + Timing | 4k bytes ETB | |
| Application accessible | Y |