ZHCSI91B November 2017 – July 2018 DRV8304
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
請參考 PDF 數據表獲取器件具體的封裝圖。
| MIN | MAX | UNIT | |
|---|---|---|---|
| Power supply voltage (VM) | –0.3 | 40 | V |
| Voltage differential between any ground pin (AGND, DGND, PGND) | –0.5 | 0.5 | V |
| Internal logic regulator voltage (DVDD) | –0.3 | 3.8 | V |
| MOSFET voltage sense (VDRAIN) | –0.3 | 40 | V |
| Charge pump voltage (VCP, CPH) | –0.3 | VM + 13.5 | V |
| Charge pump negative switching pin voltage (CPL) | –0.3 | VM | V |
| Digital pin voltage (SCLK, SDI, nSCS, ENABLE, VDS, IDRIVE, MODE, GAIN, CAL INHX, INLX) | –0.3 | 5.75 | V |
| Open drain output current range (nFAULT, SDO) | 0 | 5 | mA |
| Continuous high-side gate pin voltage (GHX) | –2 | VCP + 0.5 | V |
| Pulsed 200 ns high-side gate pin voltage (GHX) | –5 | VCP + 0.5 | V |
| High-side gate voltage with respect to SHX (GHX) | –0.3 | 13.5 | V |
| Continuous phase node pin voltage (SHX) | –2 | VM + 2 | V |
| Pulsed 200 ns phase node pin voltage (SHX) | –5 | VM + 2 | V |
| Continuous low-side gate pin voltage (GLX) | –1 | 13.5 | V |
| Pulsed 200 ns low-side gate pin voltage (GLX) | –5 | 13.5 | V |
| Gate pin source current (GHX, GLX) | Internally limited | A | |
| Gate pin sink current (GHX, GLX) | Internally limited | A | |
| Continuous shunt amplifier input pin voltage (SPX, SNX) | –1 | 1 | V |
| Pulsed 200 ns shunt amplifier input pin voltage (SPX, SNX) | –2 | 2 | V |
| Reference pin input voltage (VREF) | –0.3 | 5.75 | V |
| Shunt amplifier output pin voltage range (SOX) | –0.3 | VREF | V |
| Shunt amplifier output pin current range (SOX) | 0 | 5 | mA |
| Ambient temperature, TA | –40 | 125 | °C |
| Junction temperature, TJ | –40 | 150 | °C |
| Storage temperature, Tstg | –65 | 150 | °C |