SLUSFH4A March 2025 – July 2025 BQ25858-Q1 , BQ25858B-Q1
PRODUCTION DATA
- 1
- 1 Features
- 2 Applications
- 3 Description
- 4 Device Comparison
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 Device Power-On-Reset
- 7.3.2 Device Power-Up From Battery Without Input Source
- 7.3.3 Device Power Up From Input Source
- 7.3.4 Power Management
- 7.3.5 Bidirectional Power Flow and Programmability
- 7.3.6 Switching Frequency Dithering Feature
- 7.3.7 Integrated 16-Bit ADC for Monitoring
- 7.3.8 Status Outputs (PG, STAT and INT)
- 7.3.9
Protections
- 7.3.9.1
Voltage and Current Monitoring
- 7.3.9.1.1 VAC Over-voltage Protection (VAC_OVP)
- 7.3.9.1.2 VAC Under-voltage Protection (VAC_UVP)
- 7.3.9.1.3 Reverse Mode Over-voltage Protection (REV_OVP)
- 7.3.9.1.4 Reverse Mode Under-voltage Protection (REV_UVP)
- 7.3.9.1.5 DRV_SUP Under-voltage and Over-voltage Protection (DRV_OKZ)
- 7.3.9.1.6 REGN Under-voltage Protection (REGN_OKZ)
- 7.3.9.2 Thermal Shutdown (TSHUT)
- 7.3.9.1
Voltage and Current Monitoring
- 7.3.10 Serial Interface
- 7.4 Device Functional Modes
- 7.5 BQ25858-Q1/858B-Q1 Registers
-
8 Application and Implementation
- 8.1 Application Information
- 8.2
Typical Applications
- 8.2.1
Typical Application (Buck-Boost configuration)
- 8.2.1.1 Design Requirements
- 8.2.1.2
Detailed Design Procedure
- 8.2.1.2.1 ACUV / ACOV Input Voltage Operating Window Programming
- 8.2.1.2.2 Switching Frequency Selection
- 8.2.1.2.3 Inductor Selection
- 8.2.1.2.4 Input (VAC) Capacitor
- 8.2.1.2.5 Output (VBAT) Capacitor
- 8.2.1.2.6 Sense Resistor (RAC_SNS and RBAT_SNS) and Current Programming
- 8.2.1.2.7 Converter Fast Transient Response
- 8.2.1.3 Application Curves
- 8.2.2 Typical Application (Buck-only configuration)
- 8.2.1
Typical Application (Buck-Boost configuration)
- 8.3 Power Supply Recommendations
- 8.4 Layout
- 9 Device and Documentation Support
- 10Revision History
- 11Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RRV|36
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RRV|36
訂購(gòu)信息
7.3.4.4 Bypass Mode
The device supports bypass mode to allow VOUT = VAC without regulation and highest efficiency. In this operating mode, the buck and boost high-side FETs (Q1 and Q4) are both turned on, while the Buck and Boost low-side FETs (Q2 and Q3) remain off. The input power is directly passed through the power stage to the output. The switching losses of MOSFETs and the inductor core loss are eliminated, thereby providing highest efficiency. The bypass mode can be enabled by setting the EN_BYPASS register bit to 1.
While device is in bypass mode, the current through ROUT_SNS is monitored and compared against the IOUT_REG register setting. If the output current exceeds the register setting, the device automatically exits bypass mode and enters HIZ mode (completely disabling the power stage). The IBAT_OCP_STAT bit is set, and an INT pulse is asserted to signal the host. To recover from this fault, it is recommended to clear the EN_HIZ bit.
Figure 7-3 BQ25858-Q1/858B-Q1 Bypass Mode
Protection