SLUSFH4A March 2025 – July 2025 BQ25858-Q1 , BQ25858B-Q1
PRODUCTION DATA
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
Proper layout of the components to minimize high frequency current path loops is important to prevent electrical and magnetic field radiation and high frequency resonant problems. Here is a PCB layout priority list for proper layout.
| COMPONENTS | FUNCTION | IMPACT | GUIDELINES |
|---|---|---|---|
| Buck high side FET, Buck low side FET, input capacitors | Buck input loop | High frequency noise, ripple, efficiency | This path forms a high frequency switching loop due to the pulsating current at the input of the buck. Place components on the same side of the board. Minimize loop area to reduce parasitic inductance. Maximize trace width to reduce parasitic resistance. Place input ceramic capacitors close to the switching FETs. |
| Boost low side FET, boost high side FET, output capacitors | Boost output loop | High frequency noise, ripple, efficiency | This path forms a high frequency switching loop due to the pulsating current at the output of the boost. Place components on the same side of the board. Minimize loop area to reduce parasitic inductance. Maximize trace width to reduce parasitic resistance. Place output ceramic capacitors close to the switching FETs. |
| Sense resistors, switching FETs, inductor | Current path | Efficiency | The current path from input to output through the power stage and sense resistors has low impedance. Pay attention to via resistance if they are not on the same side. The number of vias can be estimated as 1- to 2-A per via for a 10-mil via with 1 oz. copper thickness. |
| Switching FETs, inductor | Power stage | Thermal, efficiency | The switching FETs and inductor are the components with highest power loss. Allow enough copper area for heat dissipation. Multiple thermal vias can be used to connect more copper layers together and dissipate more heat. |
| DRV_SUP, BTST1, BTST2 capacitors | Switching FET gate drive | High frequency noise, parasitic ringing, gate drive integrity | The DRV_SUP capacitor is used to supply the power to drive the low side FETs. The BTST capacitors are used to drive the high side FETs. It is recommended to place the capacitors as close as possible to the IC. |
| LODRV1, LODRV2 | Low side gate drive | High frequency noise, parasitic ringing, gate drive integrity | LODRV1 and LODRV2 supplies the gate drive current to turn on the low side FETs. The return of LODRV1 and LODRV2 is PGND. As current take the path of least impedance, a ground plane close to the low side gate drive traces is recommended. Minimize gate drive length and aim for at least 20-mil gate drive trace width. |
| HIDRV1, HIDRV2, SW1 (pin trace), SW2 (pin trace) | High side gate drive | High frequency noise, parasitic ringing, gate drive integrity | HIDRV1 and HIDRV2 supplies the gate drive current to turn on the high side FETs. The return of HIDRV1 and HIDRV2 are SW1 and SW2, respectively. Route HIDRV1/SW1 and HIDRV2/SW2 pair next to each other to reduce gate drive parasitic inductance. Minimize gate drive length and aim for at least 20-mil gate drive trace width. |
| Current limit resistors, FSW_SYNC resistor | IC programmable settings | Regulation accuracy, switching integrity | Pin voltage determines the settings for input current limit, output current limit and switching frequency. Ground noise on these could lead to inacuracy. Minimize ground return from these resistors to the IC ground pin. |
| Input (ACP, ACN) and output (SRP, SRN) current sense | Current regulation | Regulation accuracy | Use Kelvin-sensing technique for input and output current sense resistors. Connect the current sense traces to the center of the pads, and run current sense traces as differential pairs, away from switching nodes. |
| Input (ACUV), and output (FB, VO_SNS) voltage sensing | Voltage sense and regulation | Regulation accuracy | ACUV divider sets internal input voltage regulation in forward mode (VACUV_DPM). Route the top of the divider point to the target regulation location. VO_SNS sets the output voltage regulation in forward mode (VOUT_REG_ACC). Route directly to the target regulation location. Avoid routing close to high power switching nodes. |
| Bypass capacitors | Noise filter | Noise immunity | Place lowest value capacitors closest to the IC. |