SLVK181 January 2025 DRV8351-SEP
- 1
- Abstract
- Trademarks
- 1 Introduction
- 2 Single-Event Effects (SEE)
- 3 Device and Test Board Information
- 4 Irradiation Facility and Setup
- 5 Depth, Range, and LETEFF Calculation
- 6 Test Setup and Procedures
- 7 Destructive Single-Event Effects (DSEE)
- 8 Single-Event Transients (SET)
- 9 Event Rate Calculations
- 10Summary
- A References
5 Depth, Range, and LETEFF Calculation
Figure 5-1 Generalized Cross-Section Stack on the DRV8351-SEP and Application Used to Determine Ion ParametersThe DRV8351-SEP is fabricated in the TI LBC9 process with 2LM + METDCU back-end-of-line (BEOL) stack. The total stack height from the surface of the passivation to the silicon surface is 8.07μm based on nominal layer thickness as shown in Figure 5-1. Accounting for energy loss through the 1mil thick Aramica beam port window, the 40mm air gap, and the BEOL stack over the DRV8351-SEP, the effective LET (LETEFF) at the surface of the silicon substrate and the depth was determined with the SEUSS 2020 Software (provided by the Texas A&M Cyclotron Institute and based on the latest SRIM-2013 [7] models). The results are shown in Ion LETEFF, Depth, and Range in Silicon.
| Ion Type | Beam Energy (MeV / nucleon) | Angle of Incidence | Degrader Steps (Number) | Degrader Angle | LETEFF (MeV × cm2/ mg) |
|---|---|---|---|---|---|
| 109Ag | 15 | 0 | 0 | 0 | 48 |
| 109Ag | 15 | 0 | 0 | 0 | 43 |
| 84Kr | 15 | 0 | 0 | 0 | 30.6 |
| 63Cu | 15 | 0 | 0 | 0 | 20.2 |