1 Introduction

The DRV8351-SEP is a radiation-hardness-assured (RHA) 40V three half-bridge gate drivers, capable of driving high-side and low-side N-channel power MOSFETs. The DRV8351-SEP generates the correct gate drive voltages using an integrated bootstrap diode and external capacitor for the highside MOSFETs. GVDD is used to generate gate drive voltage for the low-side MOSFETs. The Gate Drive architecture supports peak up to 750mA source and 1.5A sink currents. The driver features:

• Absolute Maximum Voltage ratings
  • PVDD = 40V
  • GVDD = 15V
• Approximately 125ns propagation delay
• Approximately 4.0ns high-side and low-side matching
• 3x and 6x PWM Mode
  • 3x PWM allows for outputs to be controlled by dedicated input
  • PWM allows for two complementary outputs signals to be generated from single input

  • 6x PWM requires all INH and INL inputs to be supplied

3x PWM mode the user also has the ability to enable or disable the turn-on of both outputs when both inputs are on simultaneously (interlock protection). This gives the driver the ability to be used in multiple converter configurations.

The device is offered in a 20-pin plastic package. General device information and test conditions are listed in Table 1-1. For more detailed technical specifications, user guides, and application notes, see theDRV8351-SEP product pages.