ZHCSD93A january 2015 – december 2020 UCC28700-Q1
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNITS | |
|---|---|---|---|---|---|---|
| BIAS SUPPLY INPUT | ||||||
| IRUN | Supply current, run | IDRV = 0, run state | 2.10 | 2.65 | mA | |
| IWAIT | Supply current, wait | IDRV = 0, wait state | 85 | 110 | μA | |
| ISTART | Supply current, start | IDRV = 0, VVDD = 18 V, start state | 1.0 | 1.5 | ||
| IFAULT | Supply current, fault | IDRV = 0, fault state | 2.1 | 2.8 | mA | |
| UNDER-VOLTAGE LOCKOUT | ||||||
| VVDD(on) | VDD turn-on threshold | VVDD low to high | 17.5 | 21.0 | 23.0 | V |
| VVDD(off) | VDD turn-off threshold | VVDD high to low | 7.70 | 8.10 | 8.45 | |
| VS INPUT | ||||||
| VVSR | Regulating level | Measured at no-load condition, TJ = 25°C | 4.01 | 4.05 | 4.09 | V |
| VVSNC | Negative clamp level | IVS = -300 μA, volts below ground | 190 | 250 | 325 | mV |
| IVSB | Input bias current | VVS = 4 V | –0.25 | 0 | 0.25 | μA |
| CS INPUT | ||||||
| VCST(max) | Max CS threshold voltage | VVS = 3.7 V(1) | 715 | 750 | 775 | mV |
| VCST(min) | Min CS threshold voltage | VVS = 4.35 V(1) | 230 | 250 | 270 | |
| KAM | AM control ratio | VCST(max) / VCST(min) | 2.75 | 3.00 | 3.15 | V/V |
| VCCR | constant-current regulating level | CC regulation constant | 310 | 319 | 329 | mV |
| KLC | Line compensating current ratio | IVSLS = -300 μA, IVSLS / current out of CS pin | 23 | 25 | 28 | A/A |
| TCSLEB | Leading-edge blanking time | DRV output duration, VCS = 1 V | 195 | 235 | 275 | ns |
| DRV | ||||||
| IDRS | DRV source current | VDRV = 8 V, VVDD = 9 V | 20 | 25 | mA | |
| RDRVLS | DRV low-side drive resistance | IDRV = 10 mA | 6 | 12 | Ω | |
| VDRCL | DRV clamp voltage | VVDD = 35 V | 14 | 16 | V | |
| RDRVSS | DRV pull-down in start state | 150 | 200 | 230 | kΩ | |
| PROTECTION | ||||||
| VOVP | Over-voltage threshold | At VS input, TJ = 25°C | 4.52 | 4.60 | 4.68 | V |
| VOCP | Over-current threshold | At CS input | 1.4 | 1.5 | 1.6 | |
| IVSL(run) | VS line-sense run current | Current out of VS pin – increasing | 190 | 220 | 260 | μA |
| IVSL(stop) | VS line-sense stop current | Current out of VS pin – decreasing | 70 | 80 | 95 | |
| KVSL | VS line-sense ratio | IVSL(run) / IVSL(stop) | 2.50 | 2.80 | 3.05 | A/A |
| TJ(stop) | Thermal shut-down temperature | Internal junction temperature | 165 | °C | ||
| CABLE COMPENSATION | ||||||
| VCBC(max) | Cable compensation maximum voltage | Voltage at CBC at full load | 2.8 | 3.0 | 3.4 | V |
| VCVS(min) | Compensation at VS | VCBC = open, change in VS regulating level at full load | –45 | –15 | 25 | mV |
| VCVS(max) | Maximum compensation at VS | VCBC = 0 V, change in VS regulating level at full load | 275 | 320 | 365 | |