ZHCSD93A january 2015 – december 2020 UCC28700-Q1
PRODUCTION DATA
Upon application of input voltage to the converter, the start-up resistor connected to VDD from the bulk capacitor voltage (VBLK) charges the VDD capacitor. During charging of the VDD capacitor the device bias supply current is less than 1.5 μA. When VDD reaches the 21-V UVLO turn-on threshold, the controller is enabled and the converter starts switching. The initial three cycles are limited to IPP(min). This allows sensing any initial input or output faults with minimal power delivery. After the initial three cycles at minimum IPP(min), the controller responds to the condition dictated by the control law. The converter remains in discontinuous mode during charging of the output capacitor(s), maintaining a constant output current until the output voltage is in regulation.