ZHCSIL4A June 2018 – December 2018 TPS51200A-Q1
PRODUCTION DATA.
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| SUPPLY CURRENT | ||||||
| IIN | Supply current | TA = 25 °C, VEN = 3.3 V, No Load | 0.7 | 1 | mA | |
| IIN(SDN) | Shutdown current | TA = 25 °C, VEN = 0 V, VREFIN = 0, No Load | 65 | 80 | μA | |
| TA = 25 °C, VEN = 0 V, VREFIN > 0.4 V, No Load | 200 | 400 | ||||
| ILDOIN | Supply current of VLDOIN | TA = 25 °C, VEN = 3.3 V, No Load | 1 | 50 | μA | |
| ILDOIN(SDN) | Shutdown current of VLDOIN | TA = 25 °C, VEN = 0 V, No Load | 0.1 | 50 | μA | |
| INPUT CURRENT | ||||||
| IREFIN | Input current, REFIN | VEN = 3.3 V | 1 | μA | ||
| VO OUTPUT | ||||||
| VVOSNS | Output DC voltage, VO | VREFOUT = 1.25 V (DDR1), IO = 0 A | 1.25 | V | ||
| –15 | 15 | mV | ||||
| VREFOUT = 0.9 V (DDR2), IO = 0 A | 0.9 | V | ||||
| –15 | 15 | mV | ||||
| VREFOUT = 0.75 V (DDR3), IO = 0 A | 0.75 | V | ||||
| –15 | 15 | mV | ||||
| VREFOUT = 0.675 V (DDR3L), IO = 0 A | 0.675 | V | ||||
| -15 | 15 | mV | ||||
| VREFOUT = 0.6 V (DDR4), IO = 0 A | 0.6 | V | ||||
| -15 | 15 | mV | ||||
| VVOTOL | Output voltage tolerance to REFOUT | –2A < IVO < 2A | –25 | 25 | mV | |
| IVOSRCL | VO source current Limit | With reference to REFOUT, VOSNS = 90% × VREFOUT | 3 | 4.5 | A | |
| IVOSNCL | VO sink current Limit | With reference to REFOUT, VOSNS = 110% × VREFOUT | 3.5 | 5.5 | A | |
| IDSCHRG | Discharge current, VO | VREFIN = 0 V, VVO = 0.3 V, VEN = 0 V, TA = 25°C | 18 | 25 | Ω | |
| POWERGOOD COMPARATOR | ||||||
| VTH(PG) | VO PGOOD threshold | PGOOD window lower threshold with respect to REFOUT | –23.5% | –20% | –17.5% | |
| PGOOD window upper threshold with respect to REFOUT | 17.5% | 20% | 23.5% | |||
| PGOOD hysteresis | 5% | |||||
| VPGOODLOW | Output low voltage | ISINK = 4 mA | 0.4 | V | ||
| IPGOODLK | Leakage current(1) | VOSNS = VREFIN (PGOOD high impedance), PGOOD = VIN + 0.2 V | 1 | μA | ||
| REFIN AND REFOUT | ||||||
| VREFIN | REFIN voltage range | 0.5 | 1.8 | V | ||
| VREFINUVLO | REFIN undervoltage lockout | REFIN rising | 360 | 390 | 420 | mV |
| VREFINUVHYS | REFIN undervoltage lockout hysteresis | 20 | mV | |||
| VREFOUT | REFOUT voltage | REFIN | V | |||
| VREFOUTTOL | REFOUT voltage tolerance to VREFIN | –10 mA ≤ IREFOUT ≤ 10 mA, 0.6 V ≤ VREFIN ≤ 1.25 V | –15 | 15 | mV | |
| –1 mA ≤ IREFOUT ≤ 1 mA, 0.6 V ≤ VREFIN ≤ 1.25 V | -12 | 12 | ||||
| IREFOUTSRCL | REFOUT source current limit | VREFOUT = 0.5 V | 10 | 40 | mA | |
| IREFOUTSNCL | REFOUT sink current limit | VREFOUT = 1.5 V | 10 | 40 | mA | |
| UVLO / EN LOGIC THRESHOLD | ||||||
| VVINUVLO | UVLO threshold | Wake up, TA = 25°C | 2.2 | 2.3 | 2.375 | V |
| Hysteresis | 50 | mV | ||||
| VENIH | High-level input voltage | Enable | 1.7 | V | ||
| VENIL | Low-level input voltage | Enable | 0.3 | V | ||
| VENYST | Hysteresis voltage | Enable | 0.5 | V | ||
| IENLEAK | Logic input leakage current | EN, TA = 25°C | –1 | 1 | μA | |
| THERMAL SHUTDOWN | ||||||
| TSDN | Thermal shutdown threshold(1) | Shutdown temperature | 150 | °C | ||
| Hysteresis | 25 | |||||