SLLSFV1 March 2025 MCF8329A-Q1
PRODUCTION DATA
- 1
- 1 Features
- 2 Applications
- 3 Description
- 4 Pin Configuration and Functions
- 5 Specifications
-
6 Detailed Description
- 6.1 Overview
- 6.2 Functional Block Diagram
- 6.3
Feature Description
- 6.3.1 Three Phase BLDC Gate Drivers
- 6.3.2 Gate Drive Architecture
- 6.3.3 AVDD Linear Voltage Regulator
- 6.3.4 Low-Side Current Sense Amplifier
- 6.3.5 Device Interface Modes
- 6.3.6 Motor Control Input Options
- 6.3.7 Bootstrap Capacitor Initial Charging
- 6.3.8 Starting the Motor Under Different Initial Conditions
- 6.3.9 Motor Start Sequence (MSS)
- 6.3.10 Closed Loop Operation
- 6.3.11 Maximum Torque Per Ampere (MTPA) Control
- 6.3.12 Flux Weakening Control
- 6.3.13 Motor Parameters
- 6.3.14 Motor Parameter Extraction Tool (MPET)
- 6.3.15 Anti-Voltage Surge (AVS)
- 6.3.16 Active Braking
- 6.3.17 Output PWM Switching Frequency
- 6.3.18 Dead Time Compensation
- 6.3.19 Voltage Sense Scaling
- 6.3.20 Motor Stop Options
- 6.3.21 FG Configuration
- 6.3.22 DC Bus Current Limit
- 6.3.23
Protections
- 6.3.23.1 PVDD Supply Undervoltage Lockout (PVDD_UV)
- 6.3.23.2 AVDD Power on Reset (AVDD_POR)
- 6.3.23.3 GVDD Undervoltage Lockout (GVDD_UV)
- 6.3.23.4 BST Undervoltage Lockout (BST_UV)
- 6.3.23.5 MOSFET VDS Overcurrent Protection (VDS_OCP)
- 6.3.23.6 VSENSE Overcurrent Protection (SEN_OCP)
- 6.3.23.7 Thermal Shutdown (OTSD)
- 6.3.23.8 Hardware Lock Detection Current Limit (HW_LOCK_ILIMIT)
- 6.3.23.9 Lock Detection Current Limit (LOCK_ILIMIT)
- 6.3.23.10 Motor Lock (MTR_LCK)
- 6.3.23.11 Motor Lock Detection
- 6.3.23.12 MPET Faults
- 6.3.23.13 IPD Faults
- 6.4 Device Functional Modes
- 6.5 External Interface
- 6.6 EEPROM access and I2C interface
- 7 EEPROM (Non-Volatile) Register Map
- 8 RAM (Volatile) Register Map
- 9 Application and Implementation
- 10Device and Documentation Support
- 11Revision History
- 12Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RRY|32
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RRY|32
訂購信息
Gate Resistor Selection
The slew rate of the SHx connection will be dependent on the rate at which the gate of the external MOSFETs is controlled. The pull-up/pull-down strength of MCF8329A-Q1 is fixed internally, hence the slew rate of gate voltage can be controlled with an external series gate resistor. In some applications, the gate charge of the MOSFET, which is the load on gate driver device, is significantly larger than the gate driver peak output current capability. In such applications, external gate resistors can limit the peak output current of the gate driver. External gate resistors are also used to dampen ringing and noise.
The specific parameters of the MOSFET, system voltage, and board parasitics will all affect the final SHx slew rate, so generally selecting an optimal value or configuration of external gate resistor is an iterative process.
To lower the gate drive current, a series resistor RGATE can be placed on the gate drive outputs to control the current for the source and sink current paths. A single gate resistor will have the same gate path for source and sink gate current, so larger RGATE values will yield similar SHx slew rates. Note that gate drive current varies by PVDD voltage, junction temperature, and process variation of the device.
Figure 9-2 Gate driver outputs with series resistors
Figure 9-3 Gate driver outputs with separate source and sink current pathsTypically, it is recommended to have the sink current be twice the source current to implement a strong pull-down from gate to the source to ensure the MOSFET stays off while the opposite FET is switching. This can be implemented discretely by providing a separate path through a resistor for the source and sink currents by placing a diode and sink resistor (RSINK) in parallel to the source resistor (RSOURCE). Using the same value of source and sink resistors results in half the equivalent resistance for the sink path. This yields twice the gate drive sink current compared to the source current, and SHx will slew twice as fast when turning off the MOSFET.