SLLSFV1 March 2025 MCF8329A-Q1
PRODUCTION DATA
Overcurrent is also monitored by sensing the voltage drop across the external current sense resistor between LSS and GND pin. If at any time the voltage on the LSS input exceeds the VSEN_OCP threshold for longer than the tDS_DG deglitch time, a SEN_OCP event is recognized. After detecting the SEN_OCP overcurrent event, all of the gate driver outputs are driven low to disable the external MOSFETs and nFAULT pin is driven low. The VSENSE threshold is fixed at 0.5V. VSEN_OCP can be disabled by configuring DIS_SNS_FLT to 1b.
The device can be configured in a latched fault state or retry mode upon a VDS_OCP event using the SNS_FLT_MODE bit. With SNS_FLT_MODE = 0b, normal operation resumes after the VSEN_OCP condition is cleared and a clear fault command is issued through the CLR_FLT bit. With SNS_FLT_MODE = 1b, normal operation resumes after the VSEN_OCP condition is cleared and a time period of tLCK_RETRY is elapsed.