ZHCSLM3B August 2020 – May 2024 LP8864-Q1
PRODUCTION DATA
By default, most of the LP8864-Q1 faults trigger the INT pin. Each fault has two INT_EN bits. These bits are located in the SUPPLY_INT_EN, BOOST_INT_EN, and LED_INT_EN registers. If the INT_EN bit is read and returns 2b'10, the INT pin is triggered when that fault occurs. The fault interrupt can be disabled by writing 2b'01 to its INT_EN bits, or it can be enabled by writing 2b'11 to its INT_EN bits. There is also a GLOBAL fault interrupt that can be disabled to prevent any faults from triggering the INT pin.